xref: /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/mt_spm_suspend.h (revision 258f6a2d40ede90127abfefa9af594a4943789d7)
1*ebb44440SRoger Lu /*
2*ebb44440SRoger Lu  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3*ebb44440SRoger Lu  *
4*ebb44440SRoger Lu  * SPDX-License-Identifier: BSD-3-Clause
5*ebb44440SRoger Lu  */
6*ebb44440SRoger Lu 
7*ebb44440SRoger Lu #ifndef MT_SPM_SUSPEND_H
8*ebb44440SRoger Lu #define MT_SPM_SUSPEND_H
9*ebb44440SRoger Lu 
10*ebb44440SRoger Lu #include <mt_spm_internal.h>
11*ebb44440SRoger Lu 
12*ebb44440SRoger Lu #define MCUPM_MBOX_OFFSET_PDN	0x0C55FDA8
13*ebb44440SRoger Lu #define MCUPM_POWER_DOWN	0x4D50444E
14*ebb44440SRoger Lu 
15*ebb44440SRoger Lu enum MT_SPM_SUSPEND_MODE {
16*ebb44440SRoger Lu 	MT_SPM_SUSPEND_SYSTEM_PDN,
17*ebb44440SRoger Lu 	MT_SPM_SUSPEND_SLEEP,
18*ebb44440SRoger Lu };
19*ebb44440SRoger Lu 
20*ebb44440SRoger Lu extern int mt_spm_suspend_mode_set(int mode);
21*ebb44440SRoger Lu extern int mt_spm_suspend_enter(int state_id, unsigned int ext_opand,
22*ebb44440SRoger Lu 				unsigned int reosuce_req);
23*ebb44440SRoger Lu extern void mt_spm_suspend_resume(int state_id, unsigned int ext_opand,
24*ebb44440SRoger Lu 				  struct wake_status **status);
25*ebb44440SRoger Lu extern void mt_spm_suspend_init(void);
26*ebb44440SRoger Lu #endif /* MT_SPM_SUSPEND_H */
27