xref: /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/mt_spm_cond.h (revision 79c262327aa8ccc1ae5a0ee7f7ead3bf5ce8e022)
1ebb44440SRoger Lu /*
2*b0208c73SLiju-Clr Chen  * Copyright (c) 2020-2023, MediaTek Inc. All rights reserved.
3ebb44440SRoger Lu  *
4ebb44440SRoger Lu  * SPDX-License-Identifier: BSD-3-Clause
5ebb44440SRoger Lu  */
6ebb44440SRoger Lu 
7ebb44440SRoger Lu #ifndef MT_SPM_CONDIT_H
8ebb44440SRoger Lu #define MT_SPM_CONDIT_H
9ebb44440SRoger Lu 
10ebb44440SRoger Lu #include <mt_lp_rm.h>
11ebb44440SRoger Lu 
12ebb44440SRoger Lu enum PLAT_SPM_COND {
13ebb44440SRoger Lu 	PLAT_SPM_COND_MTCMOS1 = 0,
14ebb44440SRoger Lu 	PLAT_SPM_COND_CG_INFRA_0,
15ebb44440SRoger Lu 	PLAT_SPM_COND_CG_INFRA_1,
16ebb44440SRoger Lu 	PLAT_SPM_COND_CG_INFRA_2,
17ebb44440SRoger Lu 	PLAT_SPM_COND_CG_INFRA_3,
18ebb44440SRoger Lu 	PLAT_SPM_COND_CG_INFRA_4,
19ebb44440SRoger Lu 	PLAT_SPM_COND_CG_INFRA_5,
20ebb44440SRoger Lu 	PLAT_SPM_COND_CG_MMSYS_0,
21ebb44440SRoger Lu 	PLAT_SPM_COND_CG_MMSYS_1,
22ebb44440SRoger Lu 	PLAT_SPM_COND_CG_MMSYS_2,
23ebb44440SRoger Lu 	PLAT_SPM_COND_MAX,
24ebb44440SRoger Lu };
25ebb44440SRoger Lu 
26310c3a26SRoger Lu #define PLL_BIT_UNIVPLL	BIT(0)
27310c3a26SRoger Lu #define PLL_BIT_MFGPLL	BIT(1)
28310c3a26SRoger Lu #define PLL_BIT_MSDCPLL	BIT(2)
29310c3a26SRoger Lu #define PLL_BIT_TVDPLL	BIT(3)
30310c3a26SRoger Lu #define PLL_BIT_MMPLL	BIT(4)
31ebb44440SRoger Lu 
32ebb44440SRoger Lu /* Definition about SPM_COND_CHECK_BLOCKED
33ebb44440SRoger Lu  * bit [00 ~ 15]: cg blocking index
34ebb44440SRoger Lu  * bit [16 ~ 29]: pll blocking index
35ebb44440SRoger Lu  * bit [30]     : pll blocking information
36ebb44440SRoger Lu  * bit [31]	: idle condition check fail
37ebb44440SRoger Lu  */
38ebb44440SRoger Lu #define SPM_COND_BLOCKED_CG_IDX		U(0)
39ebb44440SRoger Lu #define SPM_COND_BLOCKED_PLL_IDX	U(16)
40ebb44440SRoger Lu #define SPM_COND_CHECK_BLOCKED_PLL	BIT(30)
41ebb44440SRoger Lu #define SPM_COND_CHECK_FAIL		BIT(31)
42ebb44440SRoger Lu 
43ebb44440SRoger Lu struct mt_spm_cond_tables {
44ebb44440SRoger Lu 	char *name;
45ebb44440SRoger Lu 	unsigned int table_cg[PLAT_SPM_COND_MAX];
46ebb44440SRoger Lu 	unsigned int table_pll;
47ebb44440SRoger Lu 	void *priv;
48ebb44440SRoger Lu };
49ebb44440SRoger Lu 
50ebb44440SRoger Lu extern unsigned int mt_spm_cond_check(int state_id,
51ebb44440SRoger Lu 				      const struct mt_spm_cond_tables *src,
52ebb44440SRoger Lu 				      const struct mt_spm_cond_tables *dest,
53ebb44440SRoger Lu 				      struct mt_spm_cond_tables *res);
54*b0208c73SLiju-Clr Chen extern int mt_spm_cond_update(struct mt_resource_constraint **con, unsigned int num,
55ebb44440SRoger Lu 			      int stateid, void *priv);
56ebb44440SRoger Lu #endif /* MT_SPM_CONDIT_H */
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