1*ebb44440SRoger Lu /*
2*ebb44440SRoger Lu * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3*ebb44440SRoger Lu *
4*ebb44440SRoger Lu * SPDX-License-Identifier: BSD-3-Clause
5*ebb44440SRoger Lu */
6*ebb44440SRoger Lu
7*ebb44440SRoger Lu #ifndef MT_SPM_H
8*ebb44440SRoger Lu #define MT_SPM_H
9*ebb44440SRoger Lu
10*ebb44440SRoger Lu #include <lib/bakery_lock.h>
11*ebb44440SRoger Lu #include <lib/spinlock.h>
12*ebb44440SRoger Lu
13*ebb44440SRoger Lu #include <plat_mtk_lpm.h>
14*ebb44440SRoger Lu
15*ebb44440SRoger Lu /*
16*ebb44440SRoger Lu * ARM v8.2, the cache will turn off automatically when cpu
17*ebb44440SRoger Lu * power down. So, there is no doubt to use the spin_lock here
18*ebb44440SRoger Lu */
19*ebb44440SRoger Lu #if !HW_ASSISTED_COHERENCY
20*ebb44440SRoger Lu #define MT_SPM_USING_BAKERY_LOCK
21*ebb44440SRoger Lu #endif
22*ebb44440SRoger Lu
23*ebb44440SRoger Lu #ifdef MT_SPM_USING_BAKERY_LOCK
24*ebb44440SRoger Lu DECLARE_BAKERY_LOCK(spm_lock);
25*ebb44440SRoger Lu #define plat_spm_lock() bakery_lock_get(&spm_lock)
26*ebb44440SRoger Lu #define plat_spm_unlock() bakery_lock_release(&spm_lock)
27*ebb44440SRoger Lu #else
28*ebb44440SRoger Lu extern spinlock_t spm_lock;
29*ebb44440SRoger Lu #define plat_spm_lock() spin_lock(&spm_lock)
30*ebb44440SRoger Lu #define plat_spm_unlock() spin_unlock(&spm_lock)
31*ebb44440SRoger Lu #endif
32*ebb44440SRoger Lu
33*ebb44440SRoger Lu #define MT_SPM_USING_SRCLKEN_RC
34*ebb44440SRoger Lu
35*ebb44440SRoger Lu /* spm extern operand definition */
36*ebb44440SRoger Lu #define MT_SPM_EX_OP_CLR_26M_RECORD (1U << 0)
37*ebb44440SRoger Lu #define MT_SPM_EX_OP_SET_WDT (1U << 1)
38*ebb44440SRoger Lu #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ (1U << 2)
39*ebb44440SRoger Lu #define MT_SPM_EX_OP_SET_SUSPEND_MODE (1U << 3)
40*ebb44440SRoger Lu #define MT_SPM_EX_OP_SET_IS_ADSP (1U << 4)
41*ebb44440SRoger Lu #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM (1U << 5)
42*ebb44440SRoger Lu #define MT_SPM_EX_OP_HW_S1_DETECT (1U << 6)
43*ebb44440SRoger Lu
44*ebb44440SRoger Lu typedef enum {
45*ebb44440SRoger Lu WR_NONE = 0,
46*ebb44440SRoger Lu WR_UART_BUSY = 1,
47*ebb44440SRoger Lu WR_ABORT = 2,
48*ebb44440SRoger Lu WR_PCM_TIMER = 3,
49*ebb44440SRoger Lu WR_WAKE_SRC = 4,
50*ebb44440SRoger Lu WR_DVFSRC = 5,
51*ebb44440SRoger Lu WR_TWAM = 6,
52*ebb44440SRoger Lu WR_PMSR = 7,
53*ebb44440SRoger Lu WR_SPM_ACK_CHK = 8,
54*ebb44440SRoger Lu WR_UNKNOWN = 9,
55*ebb44440SRoger Lu } wake_reason_t;
56*ebb44440SRoger Lu
spm_lock_get(void)57*ebb44440SRoger Lu static inline void spm_lock_get(void)
58*ebb44440SRoger Lu {
59*ebb44440SRoger Lu plat_spm_lock();
60*ebb44440SRoger Lu }
61*ebb44440SRoger Lu
spm_lock_release(void)62*ebb44440SRoger Lu static inline void spm_lock_release(void)
63*ebb44440SRoger Lu {
64*ebb44440SRoger Lu plat_spm_unlock();
65*ebb44440SRoger Lu }
66*ebb44440SRoger Lu
67*ebb44440SRoger Lu extern void spm_boot_init(void);
68*ebb44440SRoger Lu #endif /* MT_SPM_H */
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