xref: /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/pmic/pmic_wrap_init.h (revision 04f28f895f1dc8683838a1382c8f92881f4cf21d)
1cbd6331bSHsin-Hsiung Wang /*
2*ca93b018SBo-Chen Chen  * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved.
3cbd6331bSHsin-Hsiung Wang  *
4cbd6331bSHsin-Hsiung Wang  * SPDX-License-Identifier: BSD-3-Clause
5cbd6331bSHsin-Hsiung Wang  */
6cbd6331bSHsin-Hsiung Wang 
7cbd6331bSHsin-Hsiung Wang #ifndef PMIC_WRAP_INIT_H
8cbd6331bSHsin-Hsiung Wang #define PMIC_WRAP_INIT_H
9cbd6331bSHsin-Hsiung Wang 
10cbd6331bSHsin-Hsiung Wang #include <stdint.h>
11cbd6331bSHsin-Hsiung Wang 
12cbd6331bSHsin-Hsiung Wang #include "platform_def.h"
13*ca93b018SBo-Chen Chen #include <pmic_wrap_init_common.h>
14cbd6331bSHsin-Hsiung Wang 
15cbd6331bSHsin-Hsiung Wang static struct mt8192_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
16cbd6331bSHsin-Hsiung Wang 
17cbd6331bSHsin-Hsiung Wang /* PMIC_WRAP registers */
18cbd6331bSHsin-Hsiung Wang struct mt8192_pmic_wrap_regs {
19cbd6331bSHsin-Hsiung Wang 	uint32_t init_done;
20cbd6331bSHsin-Hsiung Wang 	uint32_t reserved[799];
21cbd6331bSHsin-Hsiung Wang 	uint32_t wacs2_cmd;
22cbd6331bSHsin-Hsiung Wang 	uint32_t wacs2_wdata;
23cbd6331bSHsin-Hsiung Wang 	uint32_t reserved1[3];
24cbd6331bSHsin-Hsiung Wang 	uint32_t wacs2_rdata;
25cbd6331bSHsin-Hsiung Wang 	uint32_t reserved2[3];
26cbd6331bSHsin-Hsiung Wang 	uint32_t wacs2_vldclr;
27cbd6331bSHsin-Hsiung Wang 	uint32_t wacs2_sta;
28cbd6331bSHsin-Hsiung Wang };
29cbd6331bSHsin-Hsiung Wang 
30cbd6331bSHsin-Hsiung Wang #endif /* PMIC_WRAP_INIT_H */
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