xref: /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/apusys/mtk_apusys_apc_def.h (revision 8d4aa7d95b53f707ce5094493f94e184094a886c)
1*f46e1f18SFlora Fu /*
2*f46e1f18SFlora Fu  * Copyright (c) 2021, MediaTek Inc. All rights reserved.
3*f46e1f18SFlora Fu  *
4*f46e1f18SFlora Fu  * SPDX-License-Identifier: BSD-3-Clause
5*f46e1f18SFlora Fu  */
6*f46e1f18SFlora Fu 
7*f46e1f18SFlora Fu #ifndef __MTK_APUSYS_APC_DEF_H__
8*f46e1f18SFlora Fu #define __MTK_APUSYS_APC_DEF_H__
9*f46e1f18SFlora Fu 
10*f46e1f18SFlora Fu #include <lib/mmio.h>
11*f46e1f18SFlora Fu 
12*f46e1f18SFlora Fu enum APUSYS_APC_ERR_STATUS {
13*f46e1f18SFlora Fu 	APUSYS_APC_OK = 0x0,
14*f46e1f18SFlora Fu 
15*f46e1f18SFlora Fu 	APUSYS_APC_ERR_GENERIC = 0x1000,
16*f46e1f18SFlora Fu 	APUSYS_APC_ERR_INVALID_CMD = 0x1001,
17*f46e1f18SFlora Fu 	APUSYS_APC_ERR_SLAVE_TYPE_NOT_SUPPORTED = 0x1002,
18*f46e1f18SFlora Fu 	APUSYS_APC_ERR_SLAVE_IDX_NOT_SUPPORTED = 0x1003,
19*f46e1f18SFlora Fu 	APUSYS_APC_ERR_DOMAIN_NOT_SUPPORTED = 0x1004,
20*f46e1f18SFlora Fu 	APUSYS_APC_ERR_PERMISSION_NOT_SUPPORTED = 0x1005,
21*f46e1f18SFlora Fu 	APUSYS_APC_ERR_OUT_OF_BOUNDARY = 0x1006,
22*f46e1f18SFlora Fu 	APUSYS_APC_ERR_REQ_TYPE_NOT_SUPPORTED = 0x1007,
23*f46e1f18SFlora Fu };
24*f46e1f18SFlora Fu 
25*f46e1f18SFlora Fu enum APUSYS_APC_PERM_TYPE {
26*f46e1f18SFlora Fu 	NO_PROTECTION = 0U,
27*f46e1f18SFlora Fu 	SEC_RW_ONLY = 1U,
28*f46e1f18SFlora Fu 	SEC_RW_NS_R = 2U,
29*f46e1f18SFlora Fu 	FORBIDDEN = 3U,
30*f46e1f18SFlora Fu 	PERM_NUM = 4U,
31*f46e1f18SFlora Fu };
32*f46e1f18SFlora Fu 
33*f46e1f18SFlora Fu enum APUSYS_APC_DOMAIN_ID {
34*f46e1f18SFlora Fu 	DOMAIN_0 = 0U,
35*f46e1f18SFlora Fu 	DOMAIN_1 = 1U,
36*f46e1f18SFlora Fu 	DOMAIN_2 = 2U,
37*f46e1f18SFlora Fu 	DOMAIN_3 = 3U,
38*f46e1f18SFlora Fu 	DOMAIN_4 = 4U,
39*f46e1f18SFlora Fu 	DOMAIN_5 = 5U,
40*f46e1f18SFlora Fu 	DOMAIN_6 = 6U,
41*f46e1f18SFlora Fu 	DOMAIN_7 = 7U,
42*f46e1f18SFlora Fu 	DOMAIN_8 = 8U,
43*f46e1f18SFlora Fu 	DOMAIN_9 = 9U,
44*f46e1f18SFlora Fu 	DOMAIN_10 = 10U,
45*f46e1f18SFlora Fu 	DOMAIN_11 = 11U,
46*f46e1f18SFlora Fu 	DOMAIN_12 = 12U,
47*f46e1f18SFlora Fu 	DOMAIN_13 = 13U,
48*f46e1f18SFlora Fu 	DOMAIN_14 = 14U,
49*f46e1f18SFlora Fu 	DOMAIN_15 = 15U,
50*f46e1f18SFlora Fu };
51*f46e1f18SFlora Fu 
52*f46e1f18SFlora Fu struct APC_DOM_16 {
53*f46e1f18SFlora Fu 	unsigned char d0_permission;
54*f46e1f18SFlora Fu 	unsigned char d1_permission;
55*f46e1f18SFlora Fu 	unsigned char d2_permission;
56*f46e1f18SFlora Fu 	unsigned char d3_permission;
57*f46e1f18SFlora Fu 	unsigned char d4_permission;
58*f46e1f18SFlora Fu 	unsigned char d5_permission;
59*f46e1f18SFlora Fu 	unsigned char d6_permission;
60*f46e1f18SFlora Fu 	unsigned char d7_permission;
61*f46e1f18SFlora Fu 	unsigned char d8_permission;
62*f46e1f18SFlora Fu 	unsigned char d9_permission;
63*f46e1f18SFlora Fu 	unsigned char d10_permission;
64*f46e1f18SFlora Fu 	unsigned char d11_permission;
65*f46e1f18SFlora Fu 	unsigned char d12_permission;
66*f46e1f18SFlora Fu 	unsigned char d13_permission;
67*f46e1f18SFlora Fu 	unsigned char d14_permission;
68*f46e1f18SFlora Fu 	unsigned char d15_permission;
69*f46e1f18SFlora Fu };
70*f46e1f18SFlora Fu 
71*f46e1f18SFlora Fu #define APUSYS_APC_AO_ATTR(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \
72*f46e1f18SFlora Fu 		PERM_ATTR2, PERM_ATTR3, PERM_ATTR4, PERM_ATTR5, \
73*f46e1f18SFlora Fu 		PERM_ATTR6, PERM_ATTR7, PERM_ATTR8, PERM_ATTR9, \
74*f46e1f18SFlora Fu 		PERM_ATTR10, PERM_ATTR11, PERM_ATTR12, PERM_ATTR13, \
75*f46e1f18SFlora Fu 		PERM_ATTR14, PERM_ATTR15) \
76*f46e1f18SFlora Fu 	{(unsigned char)PERM_ATTR0, (unsigned char)PERM_ATTR1, \
77*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3, \
78*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR4, (unsigned char)PERM_ATTR5, \
79*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR6, (unsigned char)PERM_ATTR7, \
80*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR8, (unsigned char)PERM_ATTR9, \
81*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR10, (unsigned char)PERM_ATTR11, \
82*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR12, (unsigned char)PERM_ATTR13, \
83*f46e1f18SFlora Fu 	(unsigned char)PERM_ATTR14, (unsigned char)PERM_ATTR15}
84*f46e1f18SFlora Fu 
85*f46e1f18SFlora Fu #define apuapc_writel(VAL, REG)		mmio_write_32((uintptr_t)REG, VAL)
86*f46e1f18SFlora Fu #define apuapc_readl(REG)		mmio_read_32((uintptr_t)REG)
87*f46e1f18SFlora Fu 
88*f46e1f18SFlora Fu /* APUSYS APC AO  Registers */
89*f46e1f18SFlora Fu #define APUSYS_APC_AO_BASE            APUSYS_APC_AO_WRAPPER_BASE
90*f46e1f18SFlora Fu #define APUSYS_APC_CON                (APUSYS_APC_AO_BASE + 0x00F00)
91*f46e1f18SFlora Fu #define APUSYS_SYS0_APC_LOCK_0        (APUSYS_APC_AO_BASE + 0x00700)
92*f46e1f18SFlora Fu 
93*f46e1f18SFlora Fu /* APUSYS NOC_DPAC_AO Registers */
94*f46e1f18SFlora Fu #define APUSYS_NOC_DAPC_CON	      (APUSYS_NOC_DAPC_AO_BASE + 0x00F00)
95*f46e1f18SFlora Fu 
96*f46e1f18SFlora Fu #define APUSYS_NOC_DAPC_GAP_BOUNDARY    4U
97*f46e1f18SFlora Fu #define APUSYS_NOC_DAPC_JUMP_GAP        12U
98*f46e1f18SFlora Fu 
99*f46e1f18SFlora Fu #define APUSYS_APC_SYS0_AO_SLAVE_NUM_IN_1_DOM       16U
100*f46e1f18SFlora Fu #define APUSYS_APC_SYS0_AO_DOM_NUM                  16U
101*f46e1f18SFlora Fu #define APUSYS_APC_SYS0_AO_SLAVE_NUM                59U
102*f46e1f18SFlora Fu 
103*f46e1f18SFlora Fu #define APUSYS_APC_SYS0_LOCK_BIT_APU_SCTRL_REVISER  11U
104*f46e1f18SFlora Fu #define APUSYS_APC_SYS0_LOCK_BIT_APUSYS_AO_5        5U
105*f46e1f18SFlora Fu 
106*f46e1f18SFlora Fu #define APUSYS_NOC_DAPC_AO_SLAVE_NUM_IN_1_DOM       16U
107*f46e1f18SFlora Fu #define APUSYS_NOC_DAPC_AO_DOM_NUM                  16U
108*f46e1f18SFlora Fu #define APUSYS_NOC_DAPC_AO_SLAVE_NUM                27U
109*f46e1f18SFlora Fu 
110*f46e1f18SFlora Fu #endif /* __MTK_APUSYS_APC_DEF_H__ */
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