xref: /rk3399_ARM-atf/plat/mediatek/mt8192/bl31_plat_setup.c (revision f85f37d4f78c8c81fb0d6402b5f98b2428a9ab54)
1*f85f37d4SNina Wu /*
2*f85f37d4SNina Wu  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3*f85f37d4SNina Wu  *
4*f85f37d4SNina Wu  * SPDX-License-Identifier: BSD-3-Clause
5*f85f37d4SNina Wu  */
6*f85f37d4SNina Wu 
7*f85f37d4SNina Wu /* System Includes */
8*f85f37d4SNina Wu #include <assert.h>
9*f85f37d4SNina Wu 
10*f85f37d4SNina Wu /* Project Includes */
11*f85f37d4SNina Wu #include <common/bl_common.h>
12*f85f37d4SNina Wu #include <common/debug.h>
13*f85f37d4SNina Wu #include <common/desc_image_load.h>
14*f85f37d4SNina Wu #include <drivers/ti/uart/uart_16550.h>
15*f85f37d4SNina Wu #include <lib/coreboot.h>
16*f85f37d4SNina Wu 
17*f85f37d4SNina Wu /* Platform Includes */
18*f85f37d4SNina Wu #include <plat_params.h>
19*f85f37d4SNina Wu #include <plat_private.h>
20*f85f37d4SNina Wu 
21*f85f37d4SNina Wu static entry_point_info_t bl32_ep_info;
22*f85f37d4SNina Wu static entry_point_info_t bl33_ep_info;
23*f85f37d4SNina Wu 
24*f85f37d4SNina Wu /*******************************************************************************
25*f85f37d4SNina Wu  * Return a pointer to the 'entry_point_info' structure of the next image for
26*f85f37d4SNina Wu  * the security state specified. BL33 corresponds to the non-secure image type
27*f85f37d4SNina Wu  * while BL32 corresponds to the secure image type. A NULL pointer is returned
28*f85f37d4SNina Wu  * if the image does not exist.
29*f85f37d4SNina Wu  ******************************************************************************/
30*f85f37d4SNina Wu entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
31*f85f37d4SNina Wu {
32*f85f37d4SNina Wu 	entry_point_info_t *next_image_info;
33*f85f37d4SNina Wu 
34*f85f37d4SNina Wu 	next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
35*f85f37d4SNina Wu 	assert(next_image_info->h.type == PARAM_EP);
36*f85f37d4SNina Wu 
37*f85f37d4SNina Wu 	/* None of the images on this platform can have 0x0 as the entrypoint */
38*f85f37d4SNina Wu 	if (next_image_info->pc) {
39*f85f37d4SNina Wu 		return next_image_info;
40*f85f37d4SNina Wu 	} else {
41*f85f37d4SNina Wu 		return NULL;
42*f85f37d4SNina Wu 	}
43*f85f37d4SNina Wu }
44*f85f37d4SNina Wu 
45*f85f37d4SNina Wu /*******************************************************************************
46*f85f37d4SNina Wu  * Perform any BL31 early platform setup. Here is an opportunity to copy
47*f85f37d4SNina Wu  * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
48*f85f37d4SNina Wu  * are lost (potentially). This needs to be done before the MMU is initialized
49*f85f37d4SNina Wu  * so that the memory layout can be used while creating page tables.
50*f85f37d4SNina Wu  * BL2 has flushed this information to memory, so we are guaranteed to pick up
51*f85f37d4SNina Wu  * good data.
52*f85f37d4SNina Wu  ******************************************************************************/
53*f85f37d4SNina Wu void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
54*f85f37d4SNina Wu 				u_register_t arg2, u_register_t arg3)
55*f85f37d4SNina Wu {
56*f85f37d4SNina Wu 	static console_t console;
57*f85f37d4SNina Wu 
58*f85f37d4SNina Wu 	params_early_setup(arg1);
59*f85f37d4SNina Wu 
60*f85f37d4SNina Wu #if COREBOOT
61*f85f37d4SNina Wu 	if (coreboot_serial.type) {
62*f85f37d4SNina Wu 		console_16550_register(coreboot_serial.baseaddr,
63*f85f37d4SNina Wu 				       coreboot_serial.input_hertz,
64*f85f37d4SNina Wu 				       coreboot_serial.baud,
65*f85f37d4SNina Wu 				       &console);
66*f85f37d4SNina Wu 	}
67*f85f37d4SNina Wu #else
68*f85f37d4SNina Wu 	console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
69*f85f37d4SNina Wu #endif
70*f85f37d4SNina Wu 
71*f85f37d4SNina Wu 	NOTICE("MT8192 bl31_setup\n");
72*f85f37d4SNina Wu 
73*f85f37d4SNina Wu 	bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
74*f85f37d4SNina Wu }
75*f85f37d4SNina Wu 
76*f85f37d4SNina Wu 
77*f85f37d4SNina Wu /*******************************************************************************
78*f85f37d4SNina Wu  * Perform any BL31 platform setup code
79*f85f37d4SNina Wu  ******************************************************************************/
80*f85f37d4SNina Wu void bl31_platform_setup(void)
81*f85f37d4SNina Wu {
82*f85f37d4SNina Wu }
83*f85f37d4SNina Wu 
84*f85f37d4SNina Wu /*******************************************************************************
85*f85f37d4SNina Wu  * Perform the very early platform specific architectural setup here. At the
86*f85f37d4SNina Wu  * moment this is only intializes the mmu in a quick and dirty way.
87*f85f37d4SNina Wu  ******************************************************************************/
88*f85f37d4SNina Wu void bl31_plat_arch_setup(void)
89*f85f37d4SNina Wu {
90*f85f37d4SNina Wu 	plat_configure_mmu_el3(BL31_START,
91*f85f37d4SNina Wu 			       BL31_END - BL31_START,
92*f85f37d4SNina Wu 			       BL_CODE_BASE,
93*f85f37d4SNina Wu 			       BL_CODE_END);
94*f85f37d4SNina Wu }
95