xref: /rk3399_ARM-atf/plat/mediatek/mt8192/aarch64/platform_common.c (revision 1123a5e2f973dc9f0223467f4782f6b2df542620)
1 /*
2  * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /* Project Includes */
8 #include <lib/xlat_tables/xlat_tables_v2.h>
9 
10 /* Platform Includes */
11 #include <platform_def.h>
12 
13 /* Table of regions to map using the MMU.  */
14 const mmap_region_t plat_mmap[] = {
15 	/* for TF text, RO, RW */
16 	MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
17 			MT_DEVICE | MT_RW | MT_SECURE),
18 	MAP_REGION_FLAT(MTK_DEV_RNG1_BASE, MTK_DEV_RNG1_SIZE,
19 			MT_DEVICE | MT_RW | MT_SECURE),
20 	MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
21 			MT_DEVICE | MT_RW | MT_SECURE),
22 	{ 0 }
23 };
24 
25 /*******************************************************************************
26  * Macro generating the code for the function setting up the pagetables as per
27  * the platform memory map & initialize the mmu, for the given exception level
28  ******************************************************************************/
29 void plat_configure_mmu_el3(uintptr_t total_base,
30 			    uintptr_t total_size,
31 			    uintptr_t ro_start,
32 			    uintptr_t ro_limit)
33 {
34 	mmap_add_region(total_base, total_base, total_size,
35 			MT_RW_DATA | MT_SECURE);
36 	mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
37 			MT_CODE | MT_SECURE);
38 	mmap_add(plat_mmap);
39 	init_xlat_tables();
40 	enable_mmu_el3(0);
41 }
42 
43 unsigned int plat_get_syscnt_freq2(void)
44 {
45 	return SYS_COUNTER_FREQ_IN_TICKS;
46 }
47