xref: /rk3399_ARM-atf/plat/mediatek/mt8189/plat_config.mk (revision b8d63a7a48dd095c520cce5cfd6c310073f9fe67)
16c60901aSGavin Liu#
26c60901aSGavin Liu# Copyright (c) 2025, MediaTek Inc. All rights reserved.
36c60901aSGavin Liu#
46c60901aSGavin Liu# SPDX-License-Identifier: BSD-3-Clause
56c60901aSGavin Liu#
66c60901aSGavin Liu
76c60901aSGavin Liu# Separate text code and read only data
86c60901aSGavin LiuSEPARATE_CODE_AND_RODATA := 1
96c60901aSGavin Liu
106c60901aSGavin Liu# ARMv8.2 and above need enable HW assist coherence
116c60901aSGavin LiuHW_ASSISTED_COHERENCY := 1
126c60901aSGavin Liu
136c60901aSGavin Liu# No need coherency memory because of HW assistency
146c60901aSGavin LiuUSE_COHERENT_MEM := 0
156c60901aSGavin Liu
166c60901aSGavin Liu# GIC600
176c60901aSGavin LiuGICV3_SUPPORT_GIC600 := 1
186c60901aSGavin Liu
196c60901aSGavin Liu#
206c60901aSGavin Liu# MTK options
216c60901aSGavin Liu#
226c60901aSGavin LiuMCUSYS_VERSION := v1
236c60901aSGavin LiuPLAT_EXTRA_RODATA_INCLUDES := 1
247794e7c0SVince LiuCONFIG_MTK_DISABLE_CACHE_AS_RAM := $(COREBOOT)
25*b8d63a7aSKai LiangCONFIG_MTK_PM_SUPPORT := y
26*b8d63a7aSKai LiangCONFIG_MTK_PM_ARCH := 8_2
27*b8d63a7aSKai LiangCONFIG_MTK_CPU_PM_SUPPORT := y
28*b8d63a7aSKai LiangCONFIG_MTK_CPU_PM_ARCH := 3_2
29*b8d63a7aSKai LiangCONFIG_MTK_SMP_EN := y
30*b8d63a7aSKai LiangCPU_PM_SPM_CORE_POWERON := y
31868b2d60SZhigang Qin
32868b2d60SZhigang QinCONFIG_MTK_PMIC := y
33868b2d60SZhigang QinCONFIG_MTK_PMIC_LOWPOWER := y
34868b2d60SZhigang QinCONFIG_MTK_PMIC_SHUTDOWN_CFG := y
35868b2d60SZhigang QinCONFIG_MTK_PMIC_SHUTDOWN_V2 := y
36257aa94fSZhigang QinCONFIG_MTK_SPMI := y
37868b2d60SZhigang QinPMIC_CHIP := mt6359p
389c9324ccSZhigang QinUSE_PMIC_WRAP_INIT_V3 := 1
396c60901aSGavin Liu
406c60901aSGavin Liu# Configs for A78 and A55
416c60901aSGavin LiuCTX_INCLUDE_AARCH32_REGS := 0
426c60901aSGavin LiuERRATA_A55_1530923 := 1
436c60901aSGavin LiuERRATA_A55_1221012 := 1
446c60901aSGavin LiuERRATA_A78_1688305 := 1
456c60901aSGavin LiuERRATA_A78_1941498 := 1
466c60901aSGavin LiuERRATA_A78_1951500 := 1
476c60901aSGavin LiuERRATA_A78_1821534 := 1
486c60901aSGavin LiuERRATA_A78_2132060 := 1
496c60901aSGavin LiuERRATA_A78_2242635 := 1
506c60901aSGavin LiuERRATA_A78_2376745 := 1
516c60901aSGavin LiuERRATA_A78_2395406 := 1
526c60901aSGavin Liu
536c60901aSGavin LiuCONFIG_ARCH_ARM_V8_2 := y
54