xref: /rk3399_ARM-atf/plat/mediatek/mt8189/drivers/gpio/mtgpio.c (revision 6ffda26bd0b90ea62a254006947b5f616a6ebcea)
1 /*
2  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <mtgpio.h>
10 #include <platform_def.h>
11 
12 typedef enum {
13 	REG_0 = 0,
14 	REG_1,
15 	REG_2,
16 	REG_3,
17 	REG_4,
18 	REG_5,
19 	REG_6,
20 	REG_7,
21 	REG_8
22 } RegEnum;
23 
mt_gpio_find_reg_addr(uint32_t pin)24 uintptr_t mt_gpio_find_reg_addr(uint32_t pin)
25 {
26 	uintptr_t reg_addr = 0U;
27 	struct mt_pin_info gpio_info;
28 
29 	assert(pin < MAX_GPIO_PIN);
30 
31 	gpio_info = mt_pin_infos[pin];
32 
33 	switch (gpio_info.base & 0xF) {
34 	case REG_0:
35 		reg_addr = IOCFG_LM_BASE;
36 		break;
37 	case REG_1:
38 		reg_addr = IOCFG_RB0_BASE;
39 		break;
40 	case REG_2:
41 		reg_addr = IOCFG_RB1_BASE;
42 		break;
43 	case REG_3:
44 		reg_addr = IOCFG_BM0_BASE;
45 		break;
46 	case REG_4:
47 		reg_addr = IOCFG_BM1_BASE;
48 		break;
49 	case REG_5:
50 		reg_addr = IOCFG_BM2_BASE;
51 		break;
52 	case REG_6:
53 		reg_addr = IOCFG_LT0_BASE;
54 		break;
55 	case REG_7:
56 		reg_addr = IOCFG_LT1_BASE;
57 		break;
58 	case REG_8:
59 		reg_addr = IOCFG_RT_BASE;
60 		break;
61 	default:
62 		break;
63 	}
64 
65 	return reg_addr;
66 }
67