1# 2# Copyright (c) 2021, MediaTek Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7MTK_PLAT := plat/mediatek 8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9 10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11 -I${MTK_PLAT_SOC}/include/ 12 13include drivers/arm/gic/v3/gicv3.mk 14include lib/xlat_tables_v2/xlat_tables.mk 15 16PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 17 ${XLAT_TABLES_LIB_SRCS} \ 18 plat/common/aarch64/crash_console_helpers.S \ 19 plat/common/plat_psci_common.c 20 21 22BL31_SOURCES += common/desc_image_load.c \ 23 drivers/ti/uart/aarch64/16550_console.S \ 24 lib/bl_aux_params/bl_aux_params.c \ 25 lib/cpus/aarch64/cortex_a55.S \ 26 lib/cpus/aarch64/cortex_a76.S \ 27 plat/common/plat_gicv3.c \ 28 ${MTK_PLAT}/common/mtk_plat_common.c \ 29 ${MTK_PLAT}/common/params_setup.c \ 30 ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 31 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 32 ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 33 ${MTK_PLAT_SOC}/plat_pm.c \ 34 ${MTK_PLAT_SOC}/plat_topology.c 35 36# Configs for A76 and A55 37HW_ASSISTED_COHERENCY := 1 38USE_COHERENT_MEM := 0 39CTX_INCLUDE_AARCH32_REGS := 0 40ERRATA_A55_1530923 := 1 41ERRATA_A55_1221012 := 1 42 43# indicate the reset vector address can be programmed 44PROGRAMMABLE_RESET_ADDRESS := 1 45 46COLD_BOOT_SINGLE_CPU := 1 47 48MACH_MT8186 := 1 49$(eval $(call add_define,MACH_MT8186)) 50 51include lib/coreboot/coreboot.mk 52