127132f13SRex-BC Chen# 227132f13SRex-BC Chen# Copyright (c) 2021, MediaTek Inc. All rights reserved. 327132f13SRex-BC Chen# 427132f13SRex-BC Chen# SPDX-License-Identifier: BSD-3-Clause 527132f13SRex-BC Chen# 627132f13SRex-BC Chen 727132f13SRex-BC ChenMTK_PLAT := plat/mediatek 827132f13SRex-BC ChenMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 927132f13SRex-BC Chen 1027132f13SRex-BC ChenPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11a6a0af57SRex-BC Chen -I${MTK_PLAT}/common/drivers/timer/ \ 121b17e34cSPenny Jan -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \ 1327132f13SRex-BC Chen -I${MTK_PLAT_SOC}/include/ 1427132f13SRex-BC Chen 1527132f13SRex-BC Cheninclude drivers/arm/gic/v3/gicv3.mk 1627132f13SRex-BC Cheninclude lib/xlat_tables_v2/xlat_tables.mk 1727132f13SRex-BC Chen 1827132f13SRex-BC ChenPLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 1927132f13SRex-BC Chen ${XLAT_TABLES_LIB_SRCS} \ 2027132f13SRex-BC Chen plat/common/aarch64/crash_console_helpers.S \ 2127132f13SRex-BC Chen plat/common/plat_psci_common.c 2227132f13SRex-BC Chen 2327132f13SRex-BC Chen 2427132f13SRex-BC ChenBL31_SOURCES += common/desc_image_load.c \ 25*d73e15e6SRex-BC Chen drivers/delay_timer/delay_timer.c \ 26*d73e15e6SRex-BC Chen drivers/delay_timer/generic_delay_timer.c \ 2727132f13SRex-BC Chen drivers/ti/uart/aarch64/16550_console.S \ 2827132f13SRex-BC Chen lib/bl_aux_params/bl_aux_params.c \ 2927132f13SRex-BC Chen lib/cpus/aarch64/cortex_a55.S \ 3027132f13SRex-BC Chen lib/cpus/aarch64/cortex_a76.S \ 3127132f13SRex-BC Chen plat/common/plat_gicv3.c \ 3227132f13SRex-BC Chen ${MTK_PLAT}/common/mtk_plat_common.c \ 3327132f13SRex-BC Chen ${MTK_PLAT}/common/params_setup.c \ 34a6a0af57SRex-BC Chen ${MTK_PLAT}/common/drivers/timer/mt_timer.c \ 3527132f13SRex-BC Chen ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 3627132f13SRex-BC Chen ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 3727132f13SRex-BC Chen ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 381b17e34cSPenny Jan ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \ 3927132f13SRex-BC Chen ${MTK_PLAT_SOC}/plat_pm.c \ 4027132f13SRex-BC Chen ${MTK_PLAT_SOC}/plat_topology.c 4127132f13SRex-BC Chen 4227132f13SRex-BC Chen# Configs for A76 and A55 4327132f13SRex-BC ChenHW_ASSISTED_COHERENCY := 1 4427132f13SRex-BC ChenUSE_COHERENT_MEM := 0 4527132f13SRex-BC ChenCTX_INCLUDE_AARCH32_REGS := 0 4627132f13SRex-BC ChenERRATA_A55_1530923 := 1 4727132f13SRex-BC ChenERRATA_A55_1221012 := 1 4827132f13SRex-BC Chen 4927132f13SRex-BC Chen# indicate the reset vector address can be programmed 5027132f13SRex-BC ChenPROGRAMMABLE_RESET_ADDRESS := 1 5127132f13SRex-BC Chen 5227132f13SRex-BC ChenCOLD_BOOT_SINGLE_CPU := 1 5327132f13SRex-BC Chen 5427132f13SRex-BC ChenMACH_MT8186 := 1 5527132f13SRex-BC Chen$(eval $(call add_define,MACH_MT8186)) 5627132f13SRex-BC Chen 5727132f13SRex-BC Cheninclude lib/coreboot/coreboot.mk 58