1*27132f13SRex-BC Chen /* 2*27132f13SRex-BC Chen * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. 3*27132f13SRex-BC Chen * 4*27132f13SRex-BC Chen * SPDX-License-Identifier: BSD-3-Clause 5*27132f13SRex-BC Chen */ 6*27132f13SRex-BC Chen 7*27132f13SRex-BC Chen #include <arch.h> 8*27132f13SRex-BC Chen #include <arch_helpers.h> 9*27132f13SRex-BC Chen #include <lib/psci/psci.h> 10*27132f13SRex-BC Chen 11*27132f13SRex-BC Chen #include <plat_helpers.h> 12*27132f13SRex-BC Chen #include <platform_def.h> 13*27132f13SRex-BC Chen 14*27132f13SRex-BC Chen const unsigned char mtk_power_domain_tree_desc[] = { 15*27132f13SRex-BC Chen /* Number of root nodes */ 16*27132f13SRex-BC Chen PLATFORM_SYSTEM_COUNT, 17*27132f13SRex-BC Chen /* Number of children for the root node */ 18*27132f13SRex-BC Chen PLATFORM_MCUSYS_COUNT, 19*27132f13SRex-BC Chen /* Number of children for the mcusys node */ 20*27132f13SRex-BC Chen PLATFORM_CLUSTER_COUNT, 21*27132f13SRex-BC Chen /* Number of children for the first cluster node */ 22*27132f13SRex-BC Chen PLATFORM_CLUSTER0_CORE_COUNT, 23*27132f13SRex-BC Chen }; 24*27132f13SRex-BC Chen plat_get_power_domain_tree_desc(void)25*27132f13SRex-BC Chenconst unsigned char *plat_get_power_domain_tree_desc(void) 26*27132f13SRex-BC Chen { 27*27132f13SRex-BC Chen return mtk_power_domain_tree_desc; 28*27132f13SRex-BC Chen } 29*27132f13SRex-BC Chen 30*27132f13SRex-BC Chen /******************************************************************************* 31*27132f13SRex-BC Chen * This function implements a part of the critical interface between the psci 32*27132f13SRex-BC Chen * generic layer and the platform that allows the former to query the platform 33*27132f13SRex-BC Chen * to convert an MPIDR to a unique linear index. An error code (-1) is returned 34*27132f13SRex-BC Chen * in case the MPIDR is invalid. 35*27132f13SRex-BC Chen ******************************************************************************/ plat_core_pos_by_mpidr(u_register_t mpidr)36*27132f13SRex-BC Chenint plat_core_pos_by_mpidr(u_register_t mpidr) 37*27132f13SRex-BC Chen { 38*27132f13SRex-BC Chen unsigned int cluster_id, cpu_id; 39*27132f13SRex-BC Chen 40*27132f13SRex-BC Chen if ((read_mpidr() & MPIDR_MT_MASK) != 0) { 41*27132f13SRex-BC Chen /* ARMv8.2 arch */ 42*27132f13SRex-BC Chen if ((mpidr & (MPIDR_AFFLVL_MASK << MPIDR_AFF0_SHIFT)) != 0) { 43*27132f13SRex-BC Chen return -1; 44*27132f13SRex-BC Chen } 45*27132f13SRex-BC Chen return plat_mediatek_calc_core_pos(mpidr); 46*27132f13SRex-BC Chen } 47*27132f13SRex-BC Chen 48*27132f13SRex-BC Chen mpidr &= MPIDR_AFFINITY_MASK; 49*27132f13SRex-BC Chen 50*27132f13SRex-BC Chen if ((mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0) { 51*27132f13SRex-BC Chen return -1; 52*27132f13SRex-BC Chen } 53*27132f13SRex-BC Chen 54*27132f13SRex-BC Chen cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 55*27132f13SRex-BC Chen cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 56*27132f13SRex-BC Chen 57*27132f13SRex-BC Chen if (cluster_id >= PLATFORM_CLUSTER_COUNT) { 58*27132f13SRex-BC Chen return -1; 59*27132f13SRex-BC Chen } 60*27132f13SRex-BC Chen 61*27132f13SRex-BC Chen /* 62*27132f13SRex-BC Chen * Validate cpu_id by checking whether it represents a CPU in 63*27132f13SRex-BC Chen * one of the two clusters present on the platform. 64*27132f13SRex-BC Chen */ 65*27132f13SRex-BC Chen if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { 66*27132f13SRex-BC Chen return -1; 67*27132f13SRex-BC Chen } 68*27132f13SRex-BC Chen 69*27132f13SRex-BC Chen return (cpu_id + (cluster_id * 8)); 70*27132f13SRex-BC Chen } 71