15aab27dcSRex-BC Chen /* 2635e6b10Sjason-ch chen * Copyright (c) 2021-2022, MediaTek Inc. All rights reserved. 35aab27dcSRex-BC Chen * 45aab27dcSRex-BC Chen * SPDX-License-Identifier: BSD-3-Clause 55aab27dcSRex-BC Chen */ 65aab27dcSRex-BC Chen 75aab27dcSRex-BC Chen #include <common/debug.h> 85aab27dcSRex-BC Chen #include <common/runtime_svc.h> 9635e6b10Sjason-ch chen #include <mt_spm_vcorefs.h> 10635e6b10Sjason-ch chen #include <mtk_sip_svc.h> 11*e46e9df0SRex-BC Chen #include <plat_dfd.h> 12635e6b10Sjason-ch chen #include "plat_sip_calls.h" 135aab27dcSRex-BC Chen 145aab27dcSRex-BC Chen uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid, 155aab27dcSRex-BC Chen u_register_t x1, 165aab27dcSRex-BC Chen u_register_t x2, 175aab27dcSRex-BC Chen u_register_t x3, 185aab27dcSRex-BC Chen u_register_t x4, 195aab27dcSRex-BC Chen void *cookie, 205aab27dcSRex-BC Chen void *handle, 215aab27dcSRex-BC Chen u_register_t flags) 225aab27dcSRex-BC Chen { 23635e6b10Sjason-ch chen uint64_t ret; 24635e6b10Sjason-ch chen 255aab27dcSRex-BC Chen switch (smc_fid) { 26635e6b10Sjason-ch chen case MTK_SIP_VCORE_CONTROL_ARCH32: 27635e6b10Sjason-ch chen case MTK_SIP_VCORE_CONTROL_ARCH64: 28635e6b10Sjason-ch chen ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4); 29635e6b10Sjason-ch chen SMC_RET2(handle, ret, x4); 30635e6b10Sjason-ch chen break; 31*e46e9df0SRex-BC Chen case MTK_SIP_KERNEL_DFD_AARCH32: 32*e46e9df0SRex-BC Chen case MTK_SIP_KERNEL_DFD_AARCH64: 33*e46e9df0SRex-BC Chen ret = dfd_smc_dispatcher(x1, x2, x3, x4); 34*e46e9df0SRex-BC Chen SMC_RET1(handle, ret); 35*e46e9df0SRex-BC Chen break; 365aab27dcSRex-BC Chen default: 375aab27dcSRex-BC Chen ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); 385aab27dcSRex-BC Chen break; 395aab27dcSRex-BC Chen } 405aab27dcSRex-BC Chen 415aab27dcSRex-BC Chen SMC_RET1(handle, SMC_UNK); 425aab27dcSRex-BC Chen } 43