15aab27dcSRex-BC Chen /* 2*635e6b10Sjason-ch chen * Copyright (c) 2021-2022, MediaTek Inc. All rights reserved. 35aab27dcSRex-BC Chen * 45aab27dcSRex-BC Chen * SPDX-License-Identifier: BSD-3-Clause 55aab27dcSRex-BC Chen */ 65aab27dcSRex-BC Chen 75aab27dcSRex-BC Chen #include <common/debug.h> 85aab27dcSRex-BC Chen #include <common/runtime_svc.h> 9*635e6b10Sjason-ch chen #include <mt_spm_vcorefs.h> 10*635e6b10Sjason-ch chen #include <mtk_sip_svc.h> 11*635e6b10Sjason-ch chen #include "plat_sip_calls.h" 125aab27dcSRex-BC Chen 135aab27dcSRex-BC Chen uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid, 145aab27dcSRex-BC Chen u_register_t x1, 155aab27dcSRex-BC Chen u_register_t x2, 165aab27dcSRex-BC Chen u_register_t x3, 175aab27dcSRex-BC Chen u_register_t x4, 185aab27dcSRex-BC Chen void *cookie, 195aab27dcSRex-BC Chen void *handle, 205aab27dcSRex-BC Chen u_register_t flags) 215aab27dcSRex-BC Chen { 22*635e6b10Sjason-ch chen uint64_t ret; 23*635e6b10Sjason-ch chen 245aab27dcSRex-BC Chen switch (smc_fid) { 25*635e6b10Sjason-ch chen case MTK_SIP_VCORE_CONTROL_ARCH32: 26*635e6b10Sjason-ch chen case MTK_SIP_VCORE_CONTROL_ARCH64: 27*635e6b10Sjason-ch chen ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4); 28*635e6b10Sjason-ch chen SMC_RET2(handle, ret, x4); 29*635e6b10Sjason-ch chen break; 305aab27dcSRex-BC Chen default: 315aab27dcSRex-BC Chen ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); 325aab27dcSRex-BC Chen break; 335aab27dcSRex-BC Chen } 345aab27dcSRex-BC Chen 355aab27dcSRex-BC Chen SMC_RET1(handle, SMC_UNK); 365aab27dcSRex-BC Chen } 37