xref: /rk3399_ARM-atf/plat/mediatek/mt8186/plat_sip_calls.c (revision 5aab27dc4294110a6c0b69bf5ec5343e7df883a7)
1*5aab27dcSRex-BC Chen /*
2*5aab27dcSRex-BC Chen  * Copyright (c) 2021, MediaTek Inc. All rights reserved.
3*5aab27dcSRex-BC Chen  *
4*5aab27dcSRex-BC Chen  * SPDX-License-Identifier: BSD-3-Clause
5*5aab27dcSRex-BC Chen  */
6*5aab27dcSRex-BC Chen 
7*5aab27dcSRex-BC Chen #include <common/debug.h>
8*5aab27dcSRex-BC Chen #include <common/runtime_svc.h>
9*5aab27dcSRex-BC Chen 
10*5aab27dcSRex-BC Chen uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
11*5aab27dcSRex-BC Chen 				u_register_t x1,
12*5aab27dcSRex-BC Chen 				u_register_t x2,
13*5aab27dcSRex-BC Chen 				u_register_t x3,
14*5aab27dcSRex-BC Chen 				u_register_t x4,
15*5aab27dcSRex-BC Chen 				void *cookie,
16*5aab27dcSRex-BC Chen 				void *handle,
17*5aab27dcSRex-BC Chen 				u_register_t flags)
18*5aab27dcSRex-BC Chen {
19*5aab27dcSRex-BC Chen 	switch (smc_fid) {
20*5aab27dcSRex-BC Chen 	default:
21*5aab27dcSRex-BC Chen 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
22*5aab27dcSRex-BC Chen 		break;
23*5aab27dcSRex-BC Chen 	}
24*5aab27dcSRex-BC Chen 
25*5aab27dcSRex-BC Chen 	SMC_RET1(handle, SMC_UNK);
26*5aab27dcSRex-BC Chen }
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