xref: /rk3399_ARM-atf/plat/mediatek/mt8186/include/sspm_reg.h (revision a20256034ec8344c876816904a1576cb8fc6a6c5)
1*7ac6a76cSjason-ch chen /*
2*7ac6a76cSjason-ch chen  * Copyright (c) 2022, MediaTek Inc. All rights reserved.
3*7ac6a76cSjason-ch chen  *
4*7ac6a76cSjason-ch chen  * SPDX-License-Identifier: BSD-3-Clause
5*7ac6a76cSjason-ch chen  */
6*7ac6a76cSjason-ch chen 
7*7ac6a76cSjason-ch chen #ifndef __SSPM_REG_H__
8*7ac6a76cSjason-ch chen #define __SSPM_REG_H__
9*7ac6a76cSjason-ch chen 
10*7ac6a76cSjason-ch chen #include "platform_def.h"
11*7ac6a76cSjason-ch chen 
12*7ac6a76cSjason-ch chen #define SSPM_CFGREG_ADDR(ofs)	(SSPM_CFGREG_BASE + (ofs))
13*7ac6a76cSjason-ch chen 
14*7ac6a76cSjason-ch chen #define SSPM_HW_SEM		SSPM_CFGREG_ADDR(0x0048)
15*7ac6a76cSjason-ch chen #define SSPM_ACAO_INT_SET	SSPM_CFGREG_ADDR(0x00D8)
16*7ac6a76cSjason-ch chen #define SSPM_ACAO_INT_CLR	SSPM_CFGREG_ADDR(0x00DC)
17*7ac6a76cSjason-ch chen 
18*7ac6a76cSjason-ch chen #define STANDBYWFI_EN(n)	(1 << (n + 8))
19*7ac6a76cSjason-ch chen #define GIC_IRQOUT_EN(n)	(1 << (n + 0))
20*7ac6a76cSjason-ch chen 
21*7ac6a76cSjason-ch chen #endif /* __SSPM_REG_H__ */
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