11da57e54SGarmin.Chang /* 21da57e54SGarmin.Chang * Copyright (c) 2021, MediaTek Inc. All rights reserved. 31da57e54SGarmin.Chang * 41da57e54SGarmin.Chang * SPDX-License-Identifier: BSD-3-Clause 51da57e54SGarmin.Chang */ 61da57e54SGarmin.Chang 71da57e54SGarmin.Chang #ifndef PLAT_PM_H 81da57e54SGarmin.Chang #define PLAT_PM_H 91da57e54SGarmin.Chang 101da57e54SGarmin.Chang #include <lib/utils_def.h> 111da57e54SGarmin.Chang 12*7ac6a76cSjason-ch chen #ifndef __ASSEMBLY__ 13*7ac6a76cSjason-ch chen extern uintptr_t mtk_suspend_footprint_addr; 14*7ac6a76cSjason-ch chen extern uintptr_t mtk_suspend_timestamp_addr; 15*7ac6a76cSjason-ch chen 161da57e54SGarmin.Chang #define MT_PLAT_PWR_STATE_CPU U(1) 171da57e54SGarmin.Chang #define MT_PLAT_PWR_STATE_CLUSTER U(2) 181da57e54SGarmin.Chang #define MT_PLAT_PWR_STATE_MCUSYS U(3) 191da57e54SGarmin.Chang #define MT_PLAT_PWR_STATE_SUSPEND2IDLE U(8) 201da57e54SGarmin.Chang #define MT_PLAT_PWR_STATE_SYSTEM_SUSPEND U(9) 211da57e54SGarmin.Chang 221da57e54SGarmin.Chang #define MTK_LOCAL_STATE_RUN U(0) 231da57e54SGarmin.Chang #define MTK_LOCAL_STATE_RET U(1) 241da57e54SGarmin.Chang #define MTK_LOCAL_STATE_OFF U(2) 251da57e54SGarmin.Chang 261da57e54SGarmin.Chang #define MTK_AFFLVL_CPU U(0) 271da57e54SGarmin.Chang #define MTK_AFFLVL_CLUSTER U(1) 281da57e54SGarmin.Chang #define MTK_AFFLVL_MCUSYS U(2) 291da57e54SGarmin.Chang #define MTK_AFFLVL_SYSTEM U(3) 301da57e54SGarmin.Chang 31*7ac6a76cSjason-ch chen void mtk_suspend_footprint_log(int idx); 32*7ac6a76cSjason-ch chen void mtk_suspend_timestamp_log(int idx); 33*7ac6a76cSjason-ch chen 34*7ac6a76cSjason-ch chen int mt_cluster_ops(int cputop_mpx, int mode, int state); 35*7ac6a76cSjason-ch chen int mt_core_ops(int cpux, int state); 36*7ac6a76cSjason-ch chen 371da57e54SGarmin.Chang #define IS_CLUSTER_OFF_STATE(s) \ 381da57e54SGarmin.Chang is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_CLUSTER]) 391da57e54SGarmin.Chang #define IS_MCUSYS_OFF_STATE(s) \ 401da57e54SGarmin.Chang is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_MCUSYS]) 411da57e54SGarmin.Chang #define IS_SYSTEM_SUSPEND_STATE(s) \ 421da57e54SGarmin.Chang is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_SYSTEM]) 431da57e54SGarmin.Chang 44*7ac6a76cSjason-ch chen /* SMC secure magic number */ 45*7ac6a76cSjason-ch chen #define SPM_LP_SMC_MAGIC (0xDAF10000) 46*7ac6a76cSjason-ch chen 47*7ac6a76cSjason-ch chen #define IS_SPM_LP_SMC(_type, _id) (_id == (SPM_LP_SMC_MAGIC | _type)) 48*7ac6a76cSjason-ch chen 49*7ac6a76cSjason-ch chen enum mtk_suspend_mode { 50*7ac6a76cSjason-ch chen MTK_MCDI_MODE = 1U, 51*7ac6a76cSjason-ch chen MTK_IDLEDRAM_MODE = 2U, 52*7ac6a76cSjason-ch chen MTK_IDLESYSPLL_MODE = 3U, 53*7ac6a76cSjason-ch chen MTK_IDLEBUS26M_MODE = 4U, 54*7ac6a76cSjason-ch chen MTK_SUSPEND_MODE = 5U, 55*7ac6a76cSjason-ch chen }; 56*7ac6a76cSjason-ch chen #endif 57*7ac6a76cSjason-ch chen 58*7ac6a76cSjason-ch chen enum mt8169_idle_model { 59*7ac6a76cSjason-ch chen IDLE_MODEL_START = 0U, 60*7ac6a76cSjason-ch chen IDLE_MODEL_RESOURCE_HEAD = IDLE_MODEL_START, 61*7ac6a76cSjason-ch chen IDLE_MODEL_BUS26M = IDLE_MODEL_RESOURCE_HEAD, 62*7ac6a76cSjason-ch chen IDLE_MODEL_SYSPLL = 1U, 63*7ac6a76cSjason-ch chen IDLE_MODEL_DRAM = 2U, 64*7ac6a76cSjason-ch chen IDLE_MODEL_NUM = 3U, 65*7ac6a76cSjason-ch chen }; 66*7ac6a76cSjason-ch chen 67*7ac6a76cSjason-ch chen #define footprint_addr(cpu) (mtk_suspend_footprint_addr + (cpu << 2)) 68*7ac6a76cSjason-ch chen #define timestamp_addr(cpu, idx) (mtk_suspend_timestamp_addr + \ 69*7ac6a76cSjason-ch chen ((cpu * MTK_SUSPEND_TIMESTAMP_MAX + idx) << 3)) 70*7ac6a76cSjason-ch chen 71*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_ENTER_CPUIDLE (0U) 72*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_BEFORE_ATF (1U) 73*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_ENTER_ATF (2U) 74*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_RESERVE_P1 (3U) 75*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_RESERVE_P2 (4U) 76*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_ENTER_SPM_SUSPEND (5U) 77*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_LEAVE_SPM_SUSPEND (6U) 78*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_BEFORE_WFI (7U) 79*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_AFTER_WFI (8U) 80*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_BEFORE_MMU (9U) 81*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_AFTER_MMU (10U) 82*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_ENTER_SPM_SUSPEND_FINISH (11U) 83*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_LEAVE_SPM_SUSPEND_FINISH (12U) 84*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_LEAVE_ATF (13U) 85*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_AFTER_ATF (14U) 86*7ac6a76cSjason-ch chen #define MTK_SUSPEND_FOOTPRINT_LEAVE_CPUIDLE (15U) 87*7ac6a76cSjason-ch chen 88*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_ENTER_CPUIDLE (0U) 89*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_BEFORE_ATF (1U) 90*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_ENTER_ATF (2U) 91*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_BEFORE_L2_FLUSH (3U) 92*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_AFTER_L2_FLUSH (4U) 93*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_ENTER_SPM_SUSPEND (5U) 94*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_LEAVE_SPM_SUSPEND (6U) 95*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_GIC_P1 (7U) 96*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_GIC_P2 (8U) 97*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_BEFORE_WFI (9U) 98*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_AFTER_WFI (10U) 99*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_RESERVE_P1 (11U) 100*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_RESERVE_P2 (12U) 101*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_GIC_P3 (13U) 102*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_GIC_P4 (14U) 103*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_ENTER_SPM_SUSPEND_FINISH (15U) 104*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_LEAVE_SPM_SUSPEND_FINISH (16U) 105*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_LEAVE_ATF (17U) 106*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_AFTER_ATF (18U) 107*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_LEAVE_CPUIDLE (19U) 108*7ac6a76cSjason-ch chen #define MTK_SUSPEND_TIMESTAMP_MAX (20U) 109*7ac6a76cSjason-ch chen 110*7ac6a76cSjason-ch chen /* 111*7ac6a76cSjason-ch chen * definition platform power state menas. 112*7ac6a76cSjason-ch chen * PLAT_MT_SYSTEM_SUSPEND - system suspend pwr level 113*7ac6a76cSjason-ch chen * PLAT_MT_CPU_SUSPEND_CLUSTER - cluster off pwr level 114*7ac6a76cSjason-ch chen */ 115*7ac6a76cSjason-ch chen #define PLAT_MT_SYSTEM_SUSPEND PLAT_MAX_OFF_STATE 116*7ac6a76cSjason-ch chen #define PLAT_MT_CPU_SUSPEND_CLUSTER PLAT_MAX_RET_STATE 117*7ac6a76cSjason-ch chen 118*7ac6a76cSjason-ch chen #define IS_PLAT_SYSTEM_SUSPEND(aff) (aff == PLAT_MT_SYSTEM_SUSPEND) 119*7ac6a76cSjason-ch chen #define IS_PLAT_SYSTEM_RETENTION(aff) (aff >= PLAT_MAX_RET_STATE) 120*7ac6a76cSjason-ch chen 121*7ac6a76cSjason-ch chen #define IS_PLAT_SUSPEND2IDLE_ID(stateid)\ 122*7ac6a76cSjason-ch chen (stateid == MT_PLAT_PWR_STATE_SUSPEND2IDLE) 123*7ac6a76cSjason-ch chen 1241da57e54SGarmin.Chang #define IS_PLAT_SUSPEND_ID(stateid) \ 1251da57e54SGarmin.Chang ((stateid == MT_PLAT_PWR_STATE_SUSPEND2IDLE) \ 1261da57e54SGarmin.Chang || (stateid == MT_PLAT_PWR_STATE_SYSTEM_SUSPEND)) 1271da57e54SGarmin.Chang 1281da57e54SGarmin.Chang #endif /* PLAT_PM_H */ 129