1*1da57e54SGarmin.Chang /* 2*1da57e54SGarmin.Chang * Copyright (c) 2021, MediaTek Inc. All rights reserved. 3*1da57e54SGarmin.Chang * 4*1da57e54SGarmin.Chang * SPDX-License-Identifier: BSD-3-Clause 5*1da57e54SGarmin.Chang */ 6*1da57e54SGarmin.Chang 7*1da57e54SGarmin.Chang #ifndef MTSPMC_H 8*1da57e54SGarmin.Chang #define MTSPMC_H 9*1da57e54SGarmin.Chang 10*1da57e54SGarmin.Chang #include <stdint.h> 11*1da57e54SGarmin.Chang 12*1da57e54SGarmin.Chang int spmc_init(void); 13*1da57e54SGarmin.Chang 14*1da57e54SGarmin.Chang void spm_poweron_cpu(unsigned int cluster, unsigned int cpu); 15*1da57e54SGarmin.Chang void spm_poweroff_cpu(unsigned int cluster, unsigned int cpu); 16*1da57e54SGarmin.Chang 17*1da57e54SGarmin.Chang void spm_poweroff_cluster(unsigned int cluster); 18*1da57e54SGarmin.Chang void spm_poweron_cluster(unsigned int cluster); 19*1da57e54SGarmin.Chang 20*1da57e54SGarmin.Chang bool spm_get_cpu_powerstate(unsigned int cluster, unsigned int cpu); 21*1da57e54SGarmin.Chang bool spm_get_cluster_powerstate(unsigned int cluster); 22*1da57e54SGarmin.Chang bool spm_get_powerstate(uint32_t mask); 23*1da57e54SGarmin.Chang 24*1da57e54SGarmin.Chang void mcucfg_init_archstate(unsigned int cluster, unsigned int cpu, bool arm64); 25*1da57e54SGarmin.Chang void mcucfg_set_bootaddr(unsigned int cluster, unsigned int cpu, uintptr_t bootaddr); 26*1da57e54SGarmin.Chang uintptr_t mcucfg_get_bootaddr(unsigned int cluster, unsigned int cpu); 27*1da57e54SGarmin.Chang 28*1da57e54SGarmin.Chang void mcucfg_disable_gic_wakeup(unsigned int cluster, unsigned int cpu); 29*1da57e54SGarmin.Chang void mcucfg_enable_gic_wakeup(unsigned int cluster, unsigned int cpu); 30*1da57e54SGarmin.Chang 31*1da57e54SGarmin.Chang #endif /* MTSPMC_H */ 32