1*af5a0c40SGuodong Liu /* 2*af5a0c40SGuodong Liu * Copyright (c) 2021, MediaTek Inc. All rights reserved. 3*af5a0c40SGuodong Liu * 4*af5a0c40SGuodong Liu * SPDX-License-Identifier: BSD-3-Clause 5*af5a0c40SGuodong Liu */ 6*af5a0c40SGuodong Liu 7*af5a0c40SGuodong Liu #include <assert.h> 8*af5a0c40SGuodong Liu #include <mtgpio.h> 9*af5a0c40SGuodong Liu #include <platform_def.h> 10*af5a0c40SGuodong Liu 11*af5a0c40SGuodong Liu uintptr_t mt_gpio_find_reg_addr(uint32_t pin) 12*af5a0c40SGuodong Liu { 13*af5a0c40SGuodong Liu uintptr_t reg_addr = 0U; 14*af5a0c40SGuodong Liu struct mt_pin_info gpio_info; 15*af5a0c40SGuodong Liu 16*af5a0c40SGuodong Liu assert(pin < MAX_GPIO_PIN); 17*af5a0c40SGuodong Liu 18*af5a0c40SGuodong Liu gpio_info = mt_pin_infos[pin]; 19*af5a0c40SGuodong Liu 20*af5a0c40SGuodong Liu switch (gpio_info.base & 0x0f) { 21*af5a0c40SGuodong Liu case 0: 22*af5a0c40SGuodong Liu reg_addr = IOCFG_LT_BASE; 23*af5a0c40SGuodong Liu break; 24*af5a0c40SGuodong Liu case 1: 25*af5a0c40SGuodong Liu reg_addr = IOCFG_LM_BASE; 26*af5a0c40SGuodong Liu break; 27*af5a0c40SGuodong Liu case 2: 28*af5a0c40SGuodong Liu reg_addr = IOCFG_LB_BASE; 29*af5a0c40SGuodong Liu break; 30*af5a0c40SGuodong Liu case 3: 31*af5a0c40SGuodong Liu reg_addr = IOCFG_BL_BASE; 32*af5a0c40SGuodong Liu break; 33*af5a0c40SGuodong Liu case 4: 34*af5a0c40SGuodong Liu reg_addr = IOCFG_RB_BASE; 35*af5a0c40SGuodong Liu break; 36*af5a0c40SGuodong Liu case 5: 37*af5a0c40SGuodong Liu reg_addr = IOCFG_RT_BASE; 38*af5a0c40SGuodong Liu break; 39*af5a0c40SGuodong Liu default: 40*af5a0c40SGuodong Liu break; 41*af5a0c40SGuodong Liu } 42*af5a0c40SGuodong Liu 43*af5a0c40SGuodong Liu return reg_addr; 44*af5a0c40SGuodong Liu } 45