127132f13SRex-BC Chen /* 227132f13SRex-BC Chen * Copyright (c) 2021, MediaTek Inc. All rights reserved. 327132f13SRex-BC Chen * 427132f13SRex-BC Chen * SPDX-License-Identifier: BSD-3-Clause 527132f13SRex-BC Chen */ 627132f13SRex-BC Chen 727132f13SRex-BC Chen /* System Includes */ 827132f13SRex-BC Chen #include <assert.h> 927132f13SRex-BC Chen 1027132f13SRex-BC Chen /* Project Includes */ 1127132f13SRex-BC Chen #include <common/bl_common.h> 1227132f13SRex-BC Chen #include <common/debug.h> 1327132f13SRex-BC Chen #include <common/desc_image_load.h> 14d73e15e6SRex-BC Chen #include <drivers/generic_delay_timer.h> 1527132f13SRex-BC Chen #include <drivers/ti/uart/uart_16550.h> 1627132f13SRex-BC Chen #include <lib/coreboot.h> 1727132f13SRex-BC Chen 1827132f13SRex-BC Chen /* Platform Includes */ 191b17e34cSPenny Jan #include <emi_mpu.h> 20206f125cSChristine Zhu #include <mt_gic_v3.h> 21*7ac6a76cSjason-ch chen #include <mt_spm.h> 22a6a0af57SRex-BC Chen #include <mt_timer.h> 23af5a0c40SGuodong Liu #include <mtgpio.h> 2495ea87ffSEdward-JW Yang #include <mtk_dcm.h> 2527132f13SRex-BC Chen #include <plat_params.h> 2627132f13SRex-BC Chen #include <plat_private.h> 2727132f13SRex-BC Chen 2827132f13SRex-BC Chen static entry_point_info_t bl32_ep_info; 2927132f13SRex-BC Chen static entry_point_info_t bl33_ep_info; 3027132f13SRex-BC Chen 3127132f13SRex-BC Chen /******************************************************************************* 3227132f13SRex-BC Chen * Return a pointer to the 'entry_point_info' structure of the next image for 3327132f13SRex-BC Chen * the security state specified. BL33 corresponds to the non-secure image type 3427132f13SRex-BC Chen * while BL32 corresponds to the secure image type. A NULL pointer is returned 3527132f13SRex-BC Chen * if the image does not exist. 3627132f13SRex-BC Chen ******************************************************************************/ 3727132f13SRex-BC Chen entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 3827132f13SRex-BC Chen { 3927132f13SRex-BC Chen entry_point_info_t *next_image_info; 4027132f13SRex-BC Chen 4127132f13SRex-BC Chen next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 4227132f13SRex-BC Chen assert(next_image_info->h.type == PARAM_EP); 4327132f13SRex-BC Chen 4427132f13SRex-BC Chen /* None of the images on this platform can have 0x0 as the entrypoint */ 4527132f13SRex-BC Chen if (next_image_info->pc) { 4627132f13SRex-BC Chen return next_image_info; 4727132f13SRex-BC Chen } else { 4827132f13SRex-BC Chen return NULL; 4927132f13SRex-BC Chen } 5027132f13SRex-BC Chen } 5127132f13SRex-BC Chen 5227132f13SRex-BC Chen /******************************************************************************* 5327132f13SRex-BC Chen * Perform any BL31 early platform setup. Here is an opportunity to copy 5427132f13SRex-BC Chen * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they 5527132f13SRex-BC Chen * are lost (potentially). This needs to be done before the MMU is initialized 5627132f13SRex-BC Chen * so that the memory layout can be used while creating page tables. 5727132f13SRex-BC Chen * BL2 has flushed this information to memory, so we are guaranteed to pick up 5827132f13SRex-BC Chen * good data. 5927132f13SRex-BC Chen ******************************************************************************/ 6027132f13SRex-BC Chen void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 6127132f13SRex-BC Chen u_register_t arg2, u_register_t arg3) 6227132f13SRex-BC Chen { 6327132f13SRex-BC Chen static console_t console; 6427132f13SRex-BC Chen 6527132f13SRex-BC Chen params_early_setup(arg1); 6627132f13SRex-BC Chen 6727132f13SRex-BC Chen #if COREBOOT 6827132f13SRex-BC Chen if (coreboot_serial.type) { 6927132f13SRex-BC Chen console_16550_register(coreboot_serial.baseaddr, 7027132f13SRex-BC Chen coreboot_serial.input_hertz, 7127132f13SRex-BC Chen coreboot_serial.baud, 7227132f13SRex-BC Chen &console); 7327132f13SRex-BC Chen } 7427132f13SRex-BC Chen #else 7527132f13SRex-BC Chen console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); 7627132f13SRex-BC Chen #endif 7727132f13SRex-BC Chen 7827132f13SRex-BC Chen INFO("MT8186 bl31_setup\n"); 7927132f13SRex-BC Chen 8027132f13SRex-BC Chen bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); 8127132f13SRex-BC Chen } 8227132f13SRex-BC Chen 8327132f13SRex-BC Chen 8427132f13SRex-BC Chen /******************************************************************************* 8527132f13SRex-BC Chen * Perform any BL31 platform setup code 8627132f13SRex-BC Chen ******************************************************************************/ 8727132f13SRex-BC Chen void bl31_platform_setup(void) 8827132f13SRex-BC Chen { 8995ea87ffSEdward-JW Yang dcm_set_default(); 9095ea87ffSEdward-JW Yang 91206f125cSChristine Zhu /* Initialize the GIC driver, CPU and distributor interfaces */ 92206f125cSChristine Zhu mt_gic_driver_init(); 93206f125cSChristine Zhu mt_gic_init(); 94206f125cSChristine Zhu 95af5a0c40SGuodong Liu mt_gpio_init(); 96a6a0af57SRex-BC Chen mt_systimer_init(); 97d73e15e6SRex-BC Chen generic_delay_timer_init(); 98*7ac6a76cSjason-ch chen spm_boot_init(); 99d73e15e6SRex-BC Chen 1001b17e34cSPenny Jan emi_mpu_init(); 10127132f13SRex-BC Chen } 10227132f13SRex-BC Chen 10327132f13SRex-BC Chen /******************************************************************************* 10427132f13SRex-BC Chen * Perform the very early platform specific architectural setup here. At the 10527132f13SRex-BC Chen * moment this is only intializes the mmu in a quick and dirty way. 10627132f13SRex-BC Chen ******************************************************************************/ 10727132f13SRex-BC Chen void bl31_plat_arch_setup(void) 10827132f13SRex-BC Chen { 10927132f13SRex-BC Chen plat_configure_mmu_el3(BL31_START, 11027132f13SRex-BC Chen BL31_END - BL31_START, 11127132f13SRex-BC Chen BL_CODE_BASE, 11227132f13SRex-BC Chen BL_CODE_END); 11327132f13SRex-BC Chen } 114