xref: /rk3399_ARM-atf/plat/mediatek/mt8186/bl31_plat_setup.c (revision 27132f13ca871dc3cf1aa6938995284cf5016e00)
1*27132f13SRex-BC Chen /*
2*27132f13SRex-BC Chen  * Copyright (c) 2021, MediaTek Inc. All rights reserved.
3*27132f13SRex-BC Chen  *
4*27132f13SRex-BC Chen  * SPDX-License-Identifier: BSD-3-Clause
5*27132f13SRex-BC Chen  */
6*27132f13SRex-BC Chen 
7*27132f13SRex-BC Chen /* System Includes */
8*27132f13SRex-BC Chen #include <assert.h>
9*27132f13SRex-BC Chen 
10*27132f13SRex-BC Chen /* Project Includes */
11*27132f13SRex-BC Chen #include <common/bl_common.h>
12*27132f13SRex-BC Chen #include <common/debug.h>
13*27132f13SRex-BC Chen #include <common/desc_image_load.h>
14*27132f13SRex-BC Chen #include <drivers/ti/uart/uart_16550.h>
15*27132f13SRex-BC Chen #include <lib/coreboot.h>
16*27132f13SRex-BC Chen 
17*27132f13SRex-BC Chen /* Platform Includes */
18*27132f13SRex-BC Chen #include <plat_params.h>
19*27132f13SRex-BC Chen #include <plat_private.h>
20*27132f13SRex-BC Chen 
21*27132f13SRex-BC Chen static entry_point_info_t bl32_ep_info;
22*27132f13SRex-BC Chen static entry_point_info_t bl33_ep_info;
23*27132f13SRex-BC Chen 
24*27132f13SRex-BC Chen /*******************************************************************************
25*27132f13SRex-BC Chen  * Return a pointer to the 'entry_point_info' structure of the next image for
26*27132f13SRex-BC Chen  * the security state specified. BL33 corresponds to the non-secure image type
27*27132f13SRex-BC Chen  * while BL32 corresponds to the secure image type. A NULL pointer is returned
28*27132f13SRex-BC Chen  * if the image does not exist.
29*27132f13SRex-BC Chen  ******************************************************************************/
30*27132f13SRex-BC Chen entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
31*27132f13SRex-BC Chen {
32*27132f13SRex-BC Chen 	entry_point_info_t *next_image_info;
33*27132f13SRex-BC Chen 
34*27132f13SRex-BC Chen 	next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
35*27132f13SRex-BC Chen 	assert(next_image_info->h.type == PARAM_EP);
36*27132f13SRex-BC Chen 
37*27132f13SRex-BC Chen 	/* None of the images on this platform can have 0x0 as the entrypoint */
38*27132f13SRex-BC Chen 	if (next_image_info->pc) {
39*27132f13SRex-BC Chen 		return next_image_info;
40*27132f13SRex-BC Chen 	} else {
41*27132f13SRex-BC Chen 		return NULL;
42*27132f13SRex-BC Chen 	}
43*27132f13SRex-BC Chen }
44*27132f13SRex-BC Chen 
45*27132f13SRex-BC Chen /*******************************************************************************
46*27132f13SRex-BC Chen  * Perform any BL31 early platform setup. Here is an opportunity to copy
47*27132f13SRex-BC Chen  * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
48*27132f13SRex-BC Chen  * are lost (potentially). This needs to be done before the MMU is initialized
49*27132f13SRex-BC Chen  * so that the memory layout can be used while creating page tables.
50*27132f13SRex-BC Chen  * BL2 has flushed this information to memory, so we are guaranteed to pick up
51*27132f13SRex-BC Chen  * good data.
52*27132f13SRex-BC Chen  ******************************************************************************/
53*27132f13SRex-BC Chen void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
54*27132f13SRex-BC Chen 				u_register_t arg2, u_register_t arg3)
55*27132f13SRex-BC Chen {
56*27132f13SRex-BC Chen 	static console_t console;
57*27132f13SRex-BC Chen 
58*27132f13SRex-BC Chen 	params_early_setup(arg1);
59*27132f13SRex-BC Chen 
60*27132f13SRex-BC Chen #if COREBOOT
61*27132f13SRex-BC Chen 	if (coreboot_serial.type) {
62*27132f13SRex-BC Chen 		console_16550_register(coreboot_serial.baseaddr,
63*27132f13SRex-BC Chen 				       coreboot_serial.input_hertz,
64*27132f13SRex-BC Chen 				       coreboot_serial.baud,
65*27132f13SRex-BC Chen 				       &console);
66*27132f13SRex-BC Chen 	}
67*27132f13SRex-BC Chen #else
68*27132f13SRex-BC Chen 	console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
69*27132f13SRex-BC Chen #endif
70*27132f13SRex-BC Chen 
71*27132f13SRex-BC Chen 	INFO("MT8186 bl31_setup\n");
72*27132f13SRex-BC Chen 
73*27132f13SRex-BC Chen 	bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
74*27132f13SRex-BC Chen }
75*27132f13SRex-BC Chen 
76*27132f13SRex-BC Chen 
77*27132f13SRex-BC Chen /*******************************************************************************
78*27132f13SRex-BC Chen  * Perform any BL31 platform setup code
79*27132f13SRex-BC Chen  ******************************************************************************/
80*27132f13SRex-BC Chen void bl31_platform_setup(void)
81*27132f13SRex-BC Chen {
82*27132f13SRex-BC Chen }
83*27132f13SRex-BC Chen 
84*27132f13SRex-BC Chen /*******************************************************************************
85*27132f13SRex-BC Chen  * Perform the very early platform specific architectural setup here. At the
86*27132f13SRex-BC Chen  * moment this is only intializes the mmu in a quick and dirty way.
87*27132f13SRex-BC Chen  ******************************************************************************/
88*27132f13SRex-BC Chen void bl31_plat_arch_setup(void)
89*27132f13SRex-BC Chen {
90*27132f13SRex-BC Chen 	plat_configure_mmu_el3(BL31_START,
91*27132f13SRex-BC Chen 			       BL31_END - BL31_START,
92*27132f13SRex-BC Chen 			       BL_CODE_BASE,
93*27132f13SRex-BC Chen 			       BL_CODE_END);
94*27132f13SRex-BC Chen }
95