xref: /rk3399_ARM-atf/plat/mediatek/mt8186/aarch64/platform_common.c (revision 7ac6a76c47d429778723aa804b64c48220a10f11)
127132f13SRex-BC Chen /*
227132f13SRex-BC Chen  * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
327132f13SRex-BC Chen  *
427132f13SRex-BC Chen  * SPDX-License-Identifier: BSD-3-Clause
527132f13SRex-BC Chen  */
627132f13SRex-BC Chen 
727132f13SRex-BC Chen #include <lib/xlat_tables/xlat_tables_v2.h>
827132f13SRex-BC Chen 
927132f13SRex-BC Chen #include <platform_def.h>
1027132f13SRex-BC Chen 
1127132f13SRex-BC Chen /* Table of regions to map using the MMU.  */
1227132f13SRex-BC Chen const mmap_region_t plat_mmap[] = {
1327132f13SRex-BC Chen 	/* for TF text, RO, RW */
1427132f13SRex-BC Chen 	MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
1527132f13SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
1627132f13SRex-BC Chen 	MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
1727132f13SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
18*7ac6a76cSjason-ch chen 	MAP_REGION_FLAT(MTK_MCDI_SRAM_BASE, MTK_MCDI_SRAM_MAP_SIZE,
19*7ac6a76cSjason-ch chen 			MT_DEVICE | MT_RW | MT_SECURE),
2027132f13SRex-BC Chen 	{ 0 }
2127132f13SRex-BC Chen };
2227132f13SRex-BC Chen 
2327132f13SRex-BC Chen /*******************************************************************************
2427132f13SRex-BC Chen  * Macro generating the code for the function setting up the pagetables as per
2527132f13SRex-BC Chen  * the platform memory map & initialize the mmu, for the given exception level
2627132f13SRex-BC Chen  ******************************************************************************/
2727132f13SRex-BC Chen void plat_configure_mmu_el3(uintptr_t total_base,
2827132f13SRex-BC Chen 			    uintptr_t total_size,
2927132f13SRex-BC Chen 			    uintptr_t ro_start,
3027132f13SRex-BC Chen 			    uintptr_t ro_limit)
3127132f13SRex-BC Chen {
3227132f13SRex-BC Chen 	mmap_add_region(total_base, total_base, total_size,
3327132f13SRex-BC Chen 			MT_RW_DATA | MT_SECURE);
3427132f13SRex-BC Chen 	mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
3527132f13SRex-BC Chen 			MT_CODE | MT_SECURE);
3627132f13SRex-BC Chen 	mmap_add(plat_mmap);
3727132f13SRex-BC Chen 	init_xlat_tables();
3827132f13SRex-BC Chen 	enable_mmu_el3(0);
3927132f13SRex-BC Chen }
4027132f13SRex-BC Chen 
4127132f13SRex-BC Chen unsigned int plat_get_syscnt_freq2(void)
4227132f13SRex-BC Chen {
4327132f13SRex-BC Chen 	return SYS_COUNTER_FREQ_IN_TICKS;
4427132f13SRex-BC Chen }
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