xref: /rk3399_ARM-atf/plat/mediatek/mt8186/aarch64/platform_common.c (revision 27132f13ca871dc3cf1aa6938995284cf5016e00)
1*27132f13SRex-BC Chen /*
2*27132f13SRex-BC Chen  * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3*27132f13SRex-BC Chen  *
4*27132f13SRex-BC Chen  * SPDX-License-Identifier: BSD-3-Clause
5*27132f13SRex-BC Chen  */
6*27132f13SRex-BC Chen 
7*27132f13SRex-BC Chen #include <lib/xlat_tables/xlat_tables_v2.h>
8*27132f13SRex-BC Chen 
9*27132f13SRex-BC Chen #include <platform_def.h>
10*27132f13SRex-BC Chen 
11*27132f13SRex-BC Chen /* Table of regions to map using the MMU.  */
12*27132f13SRex-BC Chen const mmap_region_t plat_mmap[] = {
13*27132f13SRex-BC Chen 	/* for TF text, RO, RW */
14*27132f13SRex-BC Chen 	MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
15*27132f13SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
16*27132f13SRex-BC Chen 	MAP_REGION_FLAT(MTK_DEV_RNG1_BASE, MTK_DEV_RNG1_SIZE,
17*27132f13SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
18*27132f13SRex-BC Chen 	MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
19*27132f13SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
20*27132f13SRex-BC Chen 	{ 0 }
21*27132f13SRex-BC Chen };
22*27132f13SRex-BC Chen 
23*27132f13SRex-BC Chen /*******************************************************************************
24*27132f13SRex-BC Chen  * Macro generating the code for the function setting up the pagetables as per
25*27132f13SRex-BC Chen  * the platform memory map & initialize the mmu, for the given exception level
26*27132f13SRex-BC Chen  ******************************************************************************/
27*27132f13SRex-BC Chen void plat_configure_mmu_el3(uintptr_t total_base,
28*27132f13SRex-BC Chen 			    uintptr_t total_size,
29*27132f13SRex-BC Chen 			    uintptr_t ro_start,
30*27132f13SRex-BC Chen 			    uintptr_t ro_limit)
31*27132f13SRex-BC Chen {
32*27132f13SRex-BC Chen 	mmap_add_region(total_base, total_base, total_size,
33*27132f13SRex-BC Chen 			MT_RW_DATA | MT_SECURE);
34*27132f13SRex-BC Chen 	mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
35*27132f13SRex-BC Chen 			MT_CODE | MT_SECURE);
36*27132f13SRex-BC Chen 	mmap_add(plat_mmap);
37*27132f13SRex-BC Chen 	init_xlat_tables();
38*27132f13SRex-BC Chen 	enable_mmu_el3(0);
39*27132f13SRex-BC Chen }
40*27132f13SRex-BC Chen 
41*27132f13SRex-BC Chen unsigned int plat_get_syscnt_freq2(void)
42*27132f13SRex-BC Chen {
43*27132f13SRex-BC Chen 	return SYS_COUNTER_FREQ_IN_TICKS;
44*27132f13SRex-BC Chen }
45