1*3fa9dec4Skenny liang# 2*3fa9dec4Skenny liang# Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*3fa9dec4Skenny liang# 4*3fa9dec4Skenny liang# SPDX-License-Identifier: BSD-3-Clause 5*3fa9dec4Skenny liang# 6*3fa9dec4Skenny liang 7*3fa9dec4Skenny liangMTK_PLAT := plat/mediatek 8*3fa9dec4Skenny liangMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9*3fa9dec4Skenny liang 10*3fa9dec4Skenny liangPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11*3fa9dec4Skenny liang -I${MTK_PLAT_SOC}/include/ 12*3fa9dec4Skenny liang 13*3fa9dec4Skenny liangPLAT_BL_COMMON_SOURCES := lib/xlat_tables/aarch64/xlat_tables.c \ 14*3fa9dec4Skenny liang lib/xlat_tables/xlat_tables_common.c \ 15*3fa9dec4Skenny liang plat/common/plat_gicv2.c \ 16*3fa9dec4Skenny liang plat/common/plat_psci_common.c \ 17*3fa9dec4Skenny liang plat/common/aarch64/crash_console_helpers.S 18*3fa9dec4Skenny liang 19*3fa9dec4Skenny liangBL31_SOURCES += drivers/arm/cci/cci.c \ 20*3fa9dec4Skenny liang drivers/arm/gic/common/gic_common.c \ 21*3fa9dec4Skenny liang drivers/arm/gic/v2/gicv2_main.c \ 22*3fa9dec4Skenny liang drivers/arm/gic/v2/gicv2_helpers.c \ 23*3fa9dec4Skenny liang drivers/delay_timer/delay_timer.c \ 24*3fa9dec4Skenny liang drivers/delay_timer/generic_delay_timer.c \ 25*3fa9dec4Skenny liang drivers/gpio/gpio.c \ 26*3fa9dec4Skenny liang drivers/ti/uart/aarch64/16550_console.S \ 27*3fa9dec4Skenny liang lib/cpus/aarch64/aem_generic.S \ 28*3fa9dec4Skenny liang lib/cpus/aarch64/cortex_a53.S \ 29*3fa9dec4Skenny liang lib/cpus/aarch64/cortex_a73.S \ 30*3fa9dec4Skenny liang ${MTK_PLAT}/common/mtk_plat_common.c \ 31*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 32*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 33*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/plat_pm.c \ 34*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/plat_topology.c \ 35*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 36*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/plat_debug.c \ 37*3fa9dec4Skenny liang ${MTK_PLAT_SOC}/scu.c 38*3fa9dec4Skenny liang 39*3fa9dec4Skenny liang# Enable workarounds for selected Cortex-A53 erratas. 40*3fa9dec4Skenny liangERRATA_A53_826319 := 0 41*3fa9dec4Skenny liangERRATA_A53_836870 := 1 42*3fa9dec4Skenny liangERRATA_A53_855873 := 1 43*3fa9dec4Skenny liang 44*3fa9dec4Skenny liang# indicate the reset vector address can be programmed 45*3fa9dec4Skenny liangPROGRAMMABLE_RESET_ADDRESS := 1 46*3fa9dec4Skenny liang 47*3fa9dec4Skenny liangCOLD_BOOT_SINGLE_CPU := 1 48*3fa9dec4Skenny liang 49*3fa9dec4Skenny liangMULTI_CONSOLE_API := 1 50*3fa9dec4Skenny liang 51*3fa9dec4Skenny liangMACH_MT8183 := 1 52*3fa9dec4Skenny liang$(eval $(call add_define,MACH_MT8183)) 53*3fa9dec4Skenny liang 54