xref: /rk3399_ARM-atf/plat/mediatek/mt8183/plat_debug.c (revision 394fa5d499fdfc1a0ddcaa3f2640cf5c49c25b63)
1 /*
2  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arch_helpers.h>
8 #include <common/debug.h>
9 #include <lib/mmio.h>
10 #include <plat_debug.h>
11 #include <platform_def.h>
12 
13 void circular_buffer_setup(void)
14 {
15 	/* Clear DBG_CONTROL.lastpc_disable to enable circular buffer */
16 	sync_writel(CA15M_DBG_CONTROL,
17 		    mmio_read_32(CA15M_DBG_CONTROL) & ~(BIT_CA15M_LASTPC_DIS));
18 }
19 
20 void circular_buffer_unlock(void)
21 {
22 	unsigned int i;
23 
24 	/* Disable big vproc external off (set CPU_EXT_BUCK_ISO to 0x0) */
25 	sync_writel(VPROC_EXT_CTL, mmio_read_32(VPROC_EXT_CTL) & ~(0x1 << 1));
26 
27 	/* Release vproc apb mask (set 0x0C53_2008[1] to 0x0) */
28 	sync_writel(CA15M_PWR_RST_CTL, mmio_read_32(CA15M_PWR_RST_CTL) & ~(0x1 << 1));
29 
30 	for (i = 1; i <= 4; ++i)
31 		sync_writel(MP1_CPUTOP_PWR_CON + i * 4,
32 			    (mmio_read_32(MP1_CPUTOP_PWR_CON + i * 4) & ~(0x4))|(0x4));
33 
34 	/* Set DFD.en */
35 	sync_writel(DFD_INTERNAL_CTL, 0x1);
36 }
37 
38 void circular_buffer_lock(void)
39 {
40 	/* Clear DFD.en */
41 	sync_writel(DFD_INTERNAL_CTL, 0x0);
42 }
43 
44 void clear_all_on_mux(void)
45 {
46 	sync_writel(MCU_ALL_PWR_ON_CTRL,
47 		    mmio_read_32(MCU_ALL_PWR_ON_CTRL) & ~(1 << 2));
48 	sync_writel(MCU_ALL_PWR_ON_CTRL,
49 		    mmio_read_32(MCU_ALL_PWR_ON_CTRL) & ~(1 << 1));
50 }
51 
52 void l2c_parity_check_setup(void)
53 {
54 	/* Enable DBG_CONTROL.l2parity_en */
55 	sync_writel(CA15M_DBG_CONTROL,
56 		    mmio_read_32(CA15M_DBG_CONTROL) | BIT_CA15M_L2PARITY_EN);
57 }
58