128a773efSkenny liang /* 228a773efSkenny liang * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 328a773efSkenny liang * 428a773efSkenny liang * SPDX-License-Identifier: BSD-3-Clause 528a773efSkenny liang */ 628a773efSkenny liang 728a773efSkenny liang #ifndef MT_GIC_V3_H 828a773efSkenny liang #define MT_GIC_V3_H 928a773efSkenny liang 1028a773efSkenny liang #include <lib/mmio.h> 1128a773efSkenny liang 1228a773efSkenny liang #define GIC_INT_MASK (MCUCFG_BASE + 0x5e8) 1328a773efSkenny liang #define GIC500_ACTIVE_SEL_SHIFT 3 1428a773efSkenny liang #define GIC500_ACTIVE_SEL_MASK (0x7 << GIC500_ACTIVE_SEL_SHIFT) 1528a773efSkenny liang #define GIC500_ACTIVE_CPU_SHIFT 16 1628a773efSkenny liang #define GIC500_ACTIVE_CPU_MASK (0xff << GIC500_ACTIVE_CPU_SHIFT) 1728a773efSkenny liang 18*4450a518Skenny liang #define NR_INT_POL_CTL 20 19*4450a518Skenny liang 2028a773efSkenny liang void mt_gic_driver_init(void); 2128a773efSkenny liang void mt_gic_init(void); 2228a773efSkenny liang void mt_gic_set_pending(uint32_t irq); 2328a773efSkenny liang uint32_t mt_gic_get_pending(uint32_t irq); 2428a773efSkenny liang void mt_gic_cpuif_enable(void); 2528a773efSkenny liang void mt_gic_cpuif_disable(void); 26*4450a518Skenny liang void mt_gic_rdistif_init(void); 27*4450a518Skenny liang void mt_gic_distif_save(void); 28*4450a518Skenny liang void mt_gic_distif_restore(void); 29*4450a518Skenny liang void mt_gic_rdistif_save(void); 30*4450a518Skenny liang void mt_gic_rdistif_restore(void); 3128a773efSkenny liang void mt_gic_sync_dcm_enable(void); 3228a773efSkenny liang void mt_gic_sync_dcm_disable(void); 3328a773efSkenny liang 3428a773efSkenny liang #endif /* MT_GIC_V3_H */ 35