1*9fc34bbdSkenny liang /* 2*9fc34bbdSkenny liang * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*9fc34bbdSkenny liang * 4*9fc34bbdSkenny liang * SPDX-License-Identifier: BSD-3-Clause 5*9fc34bbdSkenny liang */ 6*9fc34bbdSkenny liang #ifndef __SSPM_H__ 7*9fc34bbdSkenny liang #define __SSPM_H__ 8*9fc34bbdSkenny liang /* These should sync with sspm.bin */ 9*9fc34bbdSkenny liang #define IPI_ID_PLATFORM 0 10*9fc34bbdSkenny liang #define IPI_ID_SUSPEND 6 11*9fc34bbdSkenny liang #define PINR_OFFSET_PLATFORM 0 12*9fc34bbdSkenny liang #define PINR_SIZE_PLATFORM 3 13*9fc34bbdSkenny liang #define PINR_OFFSET_SUSPEND 2 14*9fc34bbdSkenny liang #define PINR_SIZE_SUSPEND 8 15*9fc34bbdSkenny liang 16*9fc34bbdSkenny liang #define MBOX0_BASE 0x10450000 17*9fc34bbdSkenny liang #define MBOX1_BASE 0x10460000 18*9fc34bbdSkenny liang #define MBOX3_BASE 0x10480000 19*9fc34bbdSkenny liang #define MBOX_OUT_IRQ_OFS 0x1000 20*9fc34bbdSkenny liang #define MBOX_IN_IRQ_OFS 0x1004 21*9fc34bbdSkenny liang 22*9fc34bbdSkenny liang #define SHAREMBOX_OFFSET_MCDI 0 23*9fc34bbdSkenny liang #define SHAREMBOX_SIZE_MCDI 20 24*9fc34bbdSkenny liang #define SHAREMBOX_OFFSET_SUSPEND 26 25*9fc34bbdSkenny liang #define SHAREMBOX_SIZE_SUSPEND 6 26*9fc34bbdSkenny liang 27*9fc34bbdSkenny liang int sspm_mbox_read(uint32_t slot, uint32_t *data, uint32_t len); 28*9fc34bbdSkenny liang int sspm_mbox_write(uint32_t slot, uint32_t *data, uint32_t len); 29*9fc34bbdSkenny liang int sspm_ipi_send_non_blocking(uint32_t id, uint32_t *data); 30*9fc34bbdSkenny liang int sspm_ipi_recv_non_blocking(uint32_t slot, uint32_t *data, uint32_t len); 31*9fc34bbdSkenny liang int sspm_alive_show(void); 32*9fc34bbdSkenny liang #endif /* __SSPM_H__ */ 33