xref: /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/pmic/pmic.h (revision 3ea2cc00fc0fdeef0e84a80202964609479349cd)
1e977b4dbSkenny liang /*
2e977b4dbSkenny liang  * Copyright (c) 2019, MediaTek Inc. All rights reserved.
3e977b4dbSkenny liang  *
4e977b4dbSkenny liang  * SPDX-License-Identifier: BSD-3-Clause
5e977b4dbSkenny liang  */
6e977b4dbSkenny liang 
7e977b4dbSkenny liang #ifndef PMIC_H
8e977b4dbSkenny liang #define PMIC_H
9e977b4dbSkenny liang 
10e977b4dbSkenny liang enum {
11e977b4dbSkenny liang 	PMIC_TMA_KEY = 0x03a8,
12e977b4dbSkenny liang 	PMIC_PWRHOLD = 0x0a08,
13*3c25ba44Skenny liang 	PMIC_PSEQ_ELR11 = 0x0a62,
14*3c25ba44Skenny liang 	PMIC_VPROC11_CON0 = 0x1388,
15*3c25ba44Skenny liang 	PMIC_VPROC11_OP_EN = 0x1390,
16*3c25ba44Skenny liang 	PMIC_VSRAM_PROC11_CON0 = 0x1b46,
17*3c25ba44Skenny liang 	PMIC_VSRAM_PROC11_OP_EN = 0x1b4e
18e977b4dbSkenny liang };
19e977b4dbSkenny liang 
20e977b4dbSkenny liang enum {
21e977b4dbSkenny liang 	PMIC_RG_SDN_DLY_ENB = 1U << 10
22e977b4dbSkenny liang };
23e977b4dbSkenny liang 
24e977b4dbSkenny liang /* external API */
25*3c25ba44Skenny liang void bcpu_enable(uint32_t en);
26*3c25ba44Skenny liang void bcpu_sram_enable(uint32_t en);
27e977b4dbSkenny liang void wk_pmic_enable_sdn_delay(void);
28e977b4dbSkenny liang void pmic_power_off(void);
29e977b4dbSkenny liang 
30e977b4dbSkenny liang #endif /* PMIC_H */
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