xref: /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/pmic/pmic.c (revision 3ea2cc00fc0fdeef0e84a80202964609479349cd)
1e977b4dbSkenny liang /*
2e977b4dbSkenny liang  * Copyright (c) 2019, MediaTek Inc. All rights reserved.
3e977b4dbSkenny liang  *
4e977b4dbSkenny liang  * SPDX-License-Identifier: BSD-3-Clause
5e977b4dbSkenny liang  */
6e977b4dbSkenny liang 
7e977b4dbSkenny liang #include <pmic_wrap_init.h>
8e977b4dbSkenny liang #include <pmic.h>
9e977b4dbSkenny liang 
bcpu_enable(uint32_t en)10*3c25ba44Skenny liang void bcpu_enable(uint32_t en)
11*3c25ba44Skenny liang {
12*3c25ba44Skenny liang 	pwrap_write(PMIC_VPROC11_OP_EN, 0x1);
13*3c25ba44Skenny liang 	if (en)
14*3c25ba44Skenny liang 		pwrap_write(PMIC_VPROC11_CON0, 1);
15*3c25ba44Skenny liang 	else
16*3c25ba44Skenny liang 		pwrap_write(PMIC_VPROC11_CON0, 0);
17*3c25ba44Skenny liang }
18*3c25ba44Skenny liang 
bcpu_sram_enable(uint32_t en)19*3c25ba44Skenny liang void bcpu_sram_enable(uint32_t en)
20*3c25ba44Skenny liang {
21*3c25ba44Skenny liang 	pwrap_write(PMIC_VSRAM_PROC11_OP_EN, 0x1);
22*3c25ba44Skenny liang 	if (en)
23*3c25ba44Skenny liang 		pwrap_write(PMIC_VSRAM_PROC11_CON0, 1);
24*3c25ba44Skenny liang 	else
25*3c25ba44Skenny liang 		pwrap_write(PMIC_VSRAM_PROC11_CON0, 0);
26*3c25ba44Skenny liang }
27*3c25ba44Skenny liang 
wk_pmic_enable_sdn_delay(void)28e977b4dbSkenny liang void wk_pmic_enable_sdn_delay(void)
29e977b4dbSkenny liang {
30e977b4dbSkenny liang 	uint32_t con;
31e977b4dbSkenny liang 
32e977b4dbSkenny liang 	pwrap_write(PMIC_TMA_KEY, 0x9CA7);
33e977b4dbSkenny liang 	pwrap_read(PMIC_PSEQ_ELR11, &con);
34e977b4dbSkenny liang 	con &= ~PMIC_RG_SDN_DLY_ENB;
35e977b4dbSkenny liang 	pwrap_write(PMIC_PSEQ_ELR11, con);
36e977b4dbSkenny liang 	pwrap_write(PMIC_TMA_KEY, 0);
37e977b4dbSkenny liang }
38e977b4dbSkenny liang 
pmic_power_off(void)39e977b4dbSkenny liang void pmic_power_off(void)
40e977b4dbSkenny liang {
41e977b4dbSkenny liang 	pwrap_write(PMIC_PWRHOLD, 0x0);
42e977b4dbSkenny liang }
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