1*3fa9dec4Skenny liang /* 2*3fa9dec4Skenny liang * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*3fa9dec4Skenny liang * 4*3fa9dec4Skenny liang * SPDX-License-Identifier: BSD-3-Clause 5*3fa9dec4Skenny liang */ 6*3fa9dec4Skenny liang 7*3fa9dec4Skenny liang #include <arch_helpers.h> 8*3fa9dec4Skenny liang #include <common/bl_common.h> 9*3fa9dec4Skenny liang #include <common/debug.h> 10*3fa9dec4Skenny liang #include <platform_def.h> 11*3fa9dec4Skenny liang #include <lib/utils.h> 12*3fa9dec4Skenny liang #include <lib/xlat_tables/xlat_tables.h> 13*3fa9dec4Skenny liang 14*3fa9dec4Skenny liang /* Table of regions to map using the MMU. */ 15*3fa9dec4Skenny liang const mmap_region_t plat_mmap[] = { 16*3fa9dec4Skenny liang /* for TF text, RO, RW */ 17*3fa9dec4Skenny liang MAP_REGION_FLAT(TZRAM_BASE, TZRAM_SIZE, 18*3fa9dec4Skenny liang MT_MEMORY | MT_RW | MT_SECURE), 19*3fa9dec4Skenny liang MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE, 20*3fa9dec4Skenny liang MT_DEVICE | MT_RW | MT_SECURE), 21*3fa9dec4Skenny liang MAP_REGION_FLAT(MTK_DEV_RNG1_BASE, MTK_DEV_RNG1_SIZE, 22*3fa9dec4Skenny liang MT_DEVICE | MT_RW | MT_SECURE), 23*3fa9dec4Skenny liang MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE, 24*3fa9dec4Skenny liang MT_DEVICE | MT_RW | MT_SECURE), 25*3fa9dec4Skenny liang { 0 } 26*3fa9dec4Skenny liang }; 27*3fa9dec4Skenny liang 28*3fa9dec4Skenny liang /******************************************************************************* 29*3fa9dec4Skenny liang * Macro generating the code for the function setting up the pagetables as per 30*3fa9dec4Skenny liang * the platform memory map & initialize the mmu, for the given exception level 31*3fa9dec4Skenny liang ******************************************************************************/ 32*3fa9dec4Skenny liang void plat_configure_mmu_el3(uintptr_t total_base, 33*3fa9dec4Skenny liang uintptr_t total_size, 34*3fa9dec4Skenny liang uintptr_t ro_start, 35*3fa9dec4Skenny liang uintptr_t ro_limit, 36*3fa9dec4Skenny liang uintptr_t coh_start, 37*3fa9dec4Skenny liang uintptr_t coh_limit) 38*3fa9dec4Skenny liang { 39*3fa9dec4Skenny liang mmap_add_region(total_base, total_base, total_size, 40*3fa9dec4Skenny liang MT_MEMORY | MT_RW | MT_SECURE); 41*3fa9dec4Skenny liang mmap_add_region(ro_start, ro_start, ro_limit - ro_start, 42*3fa9dec4Skenny liang MT_MEMORY | MT_RO | MT_SECURE); 43*3fa9dec4Skenny liang mmap_add_region(coh_start, coh_start, coh_limit - coh_start, 44*3fa9dec4Skenny liang MT_DEVICE | MT_RW | MT_SECURE); 45*3fa9dec4Skenny liang mmap_add(plat_mmap); 46*3fa9dec4Skenny liang init_xlat_tables(); 47*3fa9dec4Skenny liang enable_mmu_el3(0); 48*3fa9dec4Skenny liang } 49*3fa9dec4Skenny liang 50*3fa9dec4Skenny liang unsigned int plat_get_syscnt_freq2(void) 51*3fa9dec4Skenny liang { 52*3fa9dec4Skenny liang return SYS_COUNTER_FREQ_IN_TICKS; 53*3fa9dec4Skenny liang } 54