xref: /rk3399_ARM-atf/plat/mediatek/mt8173/plat_sip_calls.c (revision b659b1a755a4a73479137ca4b37f55ccba1dbde1)
1 /*
2  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 #include <debug.h>
31 #include <mmio.h>
32 #include <mtk_sip_svc.h>
33 #include <mtcmos.h>
34 #include <plat_sip_calls.h>
35 #include <runtime_svc.h>
36 
37 /* Authorized secure register list */
38 enum {
39 	SREG_HDMI_COLOR_EN = 0x14000904
40 };
41 
42 static const uint32_t authorized_sreg[] = {
43 	SREG_HDMI_COLOR_EN
44 };
45 
46 #define authorized_sreg_cnt	\
47 	(sizeof(authorized_sreg) / sizeof(authorized_sreg[0]))
48 
49 uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val)
50 {
51 	uint64_t i;
52 
53 	for (i = 0; i < authorized_sreg_cnt; i++) {
54 		if (authorized_sreg[i] == sreg) {
55 			mmio_write_32(sreg, val);
56 			return MTK_SIP_E_SUCCESS;
57 		}
58 	}
59 
60 	return MTK_SIP_E_INVALID_PARAM;
61 }
62 
63 static uint64_t mt_sip_pwr_on_mtcmos(uint32_t val)
64 {
65 	uint32_t ret;
66 
67 	ret = mtcmos_non_cpu_ctrl(1, val);
68 	if (ret)
69 		return MTK_SIP_E_INVALID_PARAM;
70 	else
71 		return MTK_SIP_E_SUCCESS;
72 }
73 
74 static uint64_t mt_sip_pwr_off_mtcmos(uint32_t val)
75 {
76 	uint32_t ret;
77 
78 	ret = mtcmos_non_cpu_ctrl(0, val);
79 	if (ret)
80 		return MTK_SIP_E_INVALID_PARAM;
81 	else
82 		return MTK_SIP_E_SUCCESS;
83 }
84 
85 static uint64_t mt_sip_pwr_mtcmos_support(void)
86 {
87 	return MTK_SIP_E_SUCCESS;
88 }
89 
90 uint64_t mediatek_plat_sip_handler(uint32_t smc_fid,
91 				   uint64_t x1,
92 				   uint64_t x2,
93 				   uint64_t x3,
94 				   uint64_t x4,
95 				   void *cookie,
96 				   void *handle,
97 				   uint64_t flags)
98 {
99 	uint64_t ret;
100 
101 	switch (smc_fid) {
102 	case MTK_SIP_PWR_ON_MTCMOS:
103 		ret = mt_sip_pwr_on_mtcmos((uint32_t)x1);
104 		SMC_RET1(handle, ret);
105 
106 	case MTK_SIP_PWR_OFF_MTCMOS:
107 		ret = mt_sip_pwr_off_mtcmos((uint32_t)x1);
108 		SMC_RET1(handle, ret);
109 
110 	case MTK_SIP_PWR_MTCMOS_SUPPORT:
111 		ret = mt_sip_pwr_mtcmos_support();
112 		SMC_RET1(handle, ret);
113 
114 	default:
115 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
116 		break;
117 	}
118 
119 	SMC_RET1(handle, SMC_UNK);
120 }
121