xref: /rk3399_ARM-atf/plat/mediatek/mt8173/plat_sip_calls.c (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
17d116dccSCC Ma /*
27d116dccSCC Ma  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
37d116dccSCC Ma  *
4*82cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
57d116dccSCC Ma  */
67ace1cc0SYi Zheng #include <crypt.h>
7b659b1a7SJimmy Huang #include <debug.h>
87d116dccSCC Ma #include <mmio.h>
97d116dccSCC Ma #include <mtk_sip_svc.h>
101a1ff8b9SJimmy Huang #include <mtcmos.h>
11b659b1a7SJimmy Huang #include <plat_sip_calls.h>
12b659b1a7SJimmy Huang #include <runtime_svc.h>
137d116dccSCC Ma 
147d116dccSCC Ma /* Authorized secure register list */
157d116dccSCC Ma enum {
167d116dccSCC Ma 	SREG_HDMI_COLOR_EN = 0x14000904
177d116dccSCC Ma };
187d116dccSCC Ma 
197d116dccSCC Ma static const uint32_t authorized_sreg[] = {
207d116dccSCC Ma 	SREG_HDMI_COLOR_EN
217d116dccSCC Ma };
227d116dccSCC Ma 
237d116dccSCC Ma #define authorized_sreg_cnt	\
247d116dccSCC Ma 	(sizeof(authorized_sreg) / sizeof(authorized_sreg[0]))
257d116dccSCC Ma 
267d116dccSCC Ma uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val)
277d116dccSCC Ma {
287d116dccSCC Ma 	uint64_t i;
297d116dccSCC Ma 
307d116dccSCC Ma 	for (i = 0; i < authorized_sreg_cnt; i++) {
317d116dccSCC Ma 		if (authorized_sreg[i] == sreg) {
327d116dccSCC Ma 			mmio_write_32(sreg, val);
337d116dccSCC Ma 			return MTK_SIP_E_SUCCESS;
347d116dccSCC Ma 		}
357d116dccSCC Ma 	}
367d116dccSCC Ma 
377d116dccSCC Ma 	return MTK_SIP_E_INVALID_PARAM;
387d116dccSCC Ma }
391a1ff8b9SJimmy Huang 
40b659b1a7SJimmy Huang static uint64_t mt_sip_pwr_on_mtcmos(uint32_t val)
411a1ff8b9SJimmy Huang {
421a1ff8b9SJimmy Huang 	uint32_t ret;
431a1ff8b9SJimmy Huang 
441a1ff8b9SJimmy Huang 	ret = mtcmos_non_cpu_ctrl(1, val);
451a1ff8b9SJimmy Huang 	if (ret)
461a1ff8b9SJimmy Huang 		return MTK_SIP_E_INVALID_PARAM;
471a1ff8b9SJimmy Huang 	else
481a1ff8b9SJimmy Huang 		return MTK_SIP_E_SUCCESS;
491a1ff8b9SJimmy Huang }
501a1ff8b9SJimmy Huang 
51b659b1a7SJimmy Huang static uint64_t mt_sip_pwr_off_mtcmos(uint32_t val)
521a1ff8b9SJimmy Huang {
531a1ff8b9SJimmy Huang 	uint32_t ret;
541a1ff8b9SJimmy Huang 
551a1ff8b9SJimmy Huang 	ret = mtcmos_non_cpu_ctrl(0, val);
561a1ff8b9SJimmy Huang 	if (ret)
571a1ff8b9SJimmy Huang 		return MTK_SIP_E_INVALID_PARAM;
581a1ff8b9SJimmy Huang 	else
591a1ff8b9SJimmy Huang 		return MTK_SIP_E_SUCCESS;
601a1ff8b9SJimmy Huang }
611a1ff8b9SJimmy Huang 
62b659b1a7SJimmy Huang static uint64_t mt_sip_pwr_mtcmos_support(void)
631a1ff8b9SJimmy Huang {
641a1ff8b9SJimmy Huang 	return MTK_SIP_E_SUCCESS;
651a1ff8b9SJimmy Huang }
66b659b1a7SJimmy Huang 
67b659b1a7SJimmy Huang uint64_t mediatek_plat_sip_handler(uint32_t smc_fid,
68b659b1a7SJimmy Huang 				   uint64_t x1,
69b659b1a7SJimmy Huang 				   uint64_t x2,
70b659b1a7SJimmy Huang 				   uint64_t x3,
71b659b1a7SJimmy Huang 				   uint64_t x4,
72b659b1a7SJimmy Huang 				   void *cookie,
73b659b1a7SJimmy Huang 				   void *handle,
74b659b1a7SJimmy Huang 				   uint64_t flags)
75b659b1a7SJimmy Huang {
76b659b1a7SJimmy Huang 	uint64_t ret;
77b659b1a7SJimmy Huang 
78b659b1a7SJimmy Huang 	switch (smc_fid) {
79b659b1a7SJimmy Huang 	case MTK_SIP_PWR_ON_MTCMOS:
80b659b1a7SJimmy Huang 		ret = mt_sip_pwr_on_mtcmos((uint32_t)x1);
81b659b1a7SJimmy Huang 		SMC_RET1(handle, ret);
82b659b1a7SJimmy Huang 
83b659b1a7SJimmy Huang 	case MTK_SIP_PWR_OFF_MTCMOS:
84b659b1a7SJimmy Huang 		ret = mt_sip_pwr_off_mtcmos((uint32_t)x1);
85b659b1a7SJimmy Huang 		SMC_RET1(handle, ret);
86b659b1a7SJimmy Huang 
87b659b1a7SJimmy Huang 	case MTK_SIP_PWR_MTCMOS_SUPPORT:
88b659b1a7SJimmy Huang 		ret = mt_sip_pwr_mtcmos_support();
89b659b1a7SJimmy Huang 		SMC_RET1(handle, ret);
90b659b1a7SJimmy Huang 
917ace1cc0SYi Zheng 	case MTK_SIP_SET_HDCP_KEY_EX:
927ace1cc0SYi Zheng 		ret = crypt_set_hdcp_key_ex(x1, x2, x3);
937ace1cc0SYi Zheng 		SMC_RET1(handle, ret);
947ace1cc0SYi Zheng 
957ace1cc0SYi Zheng 	case MTK_SIP_SET_HDCP_KEY_NUM:
967ace1cc0SYi Zheng 		ret = crypt_set_hdcp_key_num((uint32_t)x1);
977ace1cc0SYi Zheng 		SMC_RET1(handle, ret);
987ace1cc0SYi Zheng 
997ace1cc0SYi Zheng 	case MTK_SIP_CLR_HDCP_KEY:
1007ace1cc0SYi Zheng 		ret = crypt_clear_hdcp_key();
1017ace1cc0SYi Zheng 		SMC_RET1(handle, ret);
1027ace1cc0SYi Zheng 
103b659b1a7SJimmy Huang 	default:
104b659b1a7SJimmy Huang 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
105b659b1a7SJimmy Huang 		break;
106b659b1a7SJimmy Huang 	}
107b659b1a7SJimmy Huang 
108b659b1a7SJimmy Huang 	SMC_RET1(handle, SMC_UNK);
109b659b1a7SJimmy Huang }
110