xref: /rk3399_ARM-atf/plat/mediatek/mt8173/plat_sip_calls.c (revision 1a1ff8b96282dd86705b3f697b1445916048a8e7)
17d116dccSCC Ma /*
27d116dccSCC Ma  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
37d116dccSCC Ma  *
47d116dccSCC Ma  * Redistribution and use in source and binary forms, with or without
57d116dccSCC Ma  * modification, are permitted provided that the following conditions are met:
67d116dccSCC Ma  *
77d116dccSCC Ma  * Redistributions of source code must retain the above copyright notice, this
87d116dccSCC Ma  * list of conditions and the following disclaimer.
97d116dccSCC Ma  *
107d116dccSCC Ma  * Redistributions in binary form must reproduce the above copyright notice,
117d116dccSCC Ma  * this list of conditions and the following disclaimer in the documentation
127d116dccSCC Ma  * and/or other materials provided with the distribution.
137d116dccSCC Ma  *
147d116dccSCC Ma  * Neither the name of ARM nor the names of its contributors may be used
157d116dccSCC Ma  * to endorse or promote products derived from this software without specific
167d116dccSCC Ma  * prior written permission.
177d116dccSCC Ma  *
187d116dccSCC Ma  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
197d116dccSCC Ma  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
207d116dccSCC Ma  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
217d116dccSCC Ma  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
227d116dccSCC Ma  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
237d116dccSCC Ma  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
247d116dccSCC Ma  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
257d116dccSCC Ma  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
267d116dccSCC Ma  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
277d116dccSCC Ma  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
287d116dccSCC Ma  * POSSIBILITY OF SUCH DAMAGE.
297d116dccSCC Ma  */
307d116dccSCC Ma #include <mmio.h>
317d116dccSCC Ma #include <mtk_sip_svc.h>
32*1a1ff8b9SJimmy Huang #include <mtcmos.h>
337d116dccSCC Ma 
347d116dccSCC Ma /* Authorized secure register list */
357d116dccSCC Ma enum {
367d116dccSCC Ma 	SREG_HDMI_COLOR_EN = 0x14000904
377d116dccSCC Ma };
387d116dccSCC Ma 
397d116dccSCC Ma static const uint32_t authorized_sreg[] = {
407d116dccSCC Ma 	SREG_HDMI_COLOR_EN
417d116dccSCC Ma };
427d116dccSCC Ma 
437d116dccSCC Ma #define authorized_sreg_cnt	\
447d116dccSCC Ma 	(sizeof(authorized_sreg) / sizeof(authorized_sreg[0]))
457d116dccSCC Ma 
467d116dccSCC Ma uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val)
477d116dccSCC Ma {
487d116dccSCC Ma 	uint64_t i;
497d116dccSCC Ma 
507d116dccSCC Ma 	for (i = 0; i < authorized_sreg_cnt; i++) {
517d116dccSCC Ma 		if (authorized_sreg[i] == sreg) {
527d116dccSCC Ma 			mmio_write_32(sreg, val);
537d116dccSCC Ma 			return MTK_SIP_E_SUCCESS;
547d116dccSCC Ma 		}
557d116dccSCC Ma 	}
567d116dccSCC Ma 
577d116dccSCC Ma 	return MTK_SIP_E_INVALID_PARAM;
587d116dccSCC Ma }
59*1a1ff8b9SJimmy Huang 
60*1a1ff8b9SJimmy Huang uint64_t mt_sip_pwr_on_mtcmos(uint32_t val)
61*1a1ff8b9SJimmy Huang {
62*1a1ff8b9SJimmy Huang 	uint32_t ret;
63*1a1ff8b9SJimmy Huang 
64*1a1ff8b9SJimmy Huang 	ret = mtcmos_non_cpu_ctrl(1, val);
65*1a1ff8b9SJimmy Huang 	if (ret)
66*1a1ff8b9SJimmy Huang 		return MTK_SIP_E_INVALID_PARAM;
67*1a1ff8b9SJimmy Huang 	else
68*1a1ff8b9SJimmy Huang 		return MTK_SIP_E_SUCCESS;
69*1a1ff8b9SJimmy Huang }
70*1a1ff8b9SJimmy Huang 
71*1a1ff8b9SJimmy Huang uint64_t mt_sip_pwr_off_mtcmos(uint32_t val)
72*1a1ff8b9SJimmy Huang {
73*1a1ff8b9SJimmy Huang 	uint32_t ret;
74*1a1ff8b9SJimmy Huang 
75*1a1ff8b9SJimmy Huang 	ret = mtcmos_non_cpu_ctrl(0, val);
76*1a1ff8b9SJimmy Huang 	if (ret)
77*1a1ff8b9SJimmy Huang 		return MTK_SIP_E_INVALID_PARAM;
78*1a1ff8b9SJimmy Huang 	else
79*1a1ff8b9SJimmy Huang 		return MTK_SIP_E_SUCCESS;
80*1a1ff8b9SJimmy Huang }
81*1a1ff8b9SJimmy Huang 
82*1a1ff8b9SJimmy Huang uint64_t mt_sip_pwr_mtcmos_support(void)
83*1a1ff8b9SJimmy Huang {
84*1a1ff8b9SJimmy Huang 	return MTK_SIP_E_SUCCESS;
85*1a1ff8b9SJimmy Huang }
86