17d116dccSCC Ma /* 27d116dccSCC Ma * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 37d116dccSCC Ma * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 57d116dccSCC Ma */ 6*09d40e0eSAntonio Nino Diaz 7*09d40e0eSAntonio Nino Diaz #include <common/debug.h> 8*09d40e0eSAntonio Nino Diaz #include <common/runtime_svc.h> 9*09d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 10*09d40e0eSAntonio Nino Diaz 117ace1cc0SYi Zheng #include <crypt.h> 121a1ff8b9SJimmy Huang #include <mtcmos.h> 13ee1ebbd1SIsla Mitchell #include <mtk_sip_svc.h> 14b659b1a7SJimmy Huang #include <plat_sip_calls.h> 157d116dccSCC Ma 167d116dccSCC Ma /* Authorized secure register list */ 177d116dccSCC Ma enum { 187d116dccSCC Ma SREG_HDMI_COLOR_EN = 0x14000904 197d116dccSCC Ma }; 207d116dccSCC Ma 217d116dccSCC Ma static const uint32_t authorized_sreg[] = { 227d116dccSCC Ma SREG_HDMI_COLOR_EN 237d116dccSCC Ma }; 247d116dccSCC Ma 257d116dccSCC Ma #define authorized_sreg_cnt \ 267d116dccSCC Ma (sizeof(authorized_sreg) / sizeof(authorized_sreg[0])) 277d116dccSCC Ma 287d116dccSCC Ma uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val) 297d116dccSCC Ma { 307d116dccSCC Ma uint64_t i; 317d116dccSCC Ma 327d116dccSCC Ma for (i = 0; i < authorized_sreg_cnt; i++) { 337d116dccSCC Ma if (authorized_sreg[i] == sreg) { 347d116dccSCC Ma mmio_write_32(sreg, val); 357d116dccSCC Ma return MTK_SIP_E_SUCCESS; 367d116dccSCC Ma } 377d116dccSCC Ma } 387d116dccSCC Ma 397d116dccSCC Ma return MTK_SIP_E_INVALID_PARAM; 407d116dccSCC Ma } 411a1ff8b9SJimmy Huang 42b659b1a7SJimmy Huang static uint64_t mt_sip_pwr_on_mtcmos(uint32_t val) 431a1ff8b9SJimmy Huang { 441a1ff8b9SJimmy Huang uint32_t ret; 451a1ff8b9SJimmy Huang 461a1ff8b9SJimmy Huang ret = mtcmos_non_cpu_ctrl(1, val); 471a1ff8b9SJimmy Huang if (ret) 481a1ff8b9SJimmy Huang return MTK_SIP_E_INVALID_PARAM; 491a1ff8b9SJimmy Huang else 501a1ff8b9SJimmy Huang return MTK_SIP_E_SUCCESS; 511a1ff8b9SJimmy Huang } 521a1ff8b9SJimmy Huang 53b659b1a7SJimmy Huang static uint64_t mt_sip_pwr_off_mtcmos(uint32_t val) 541a1ff8b9SJimmy Huang { 551a1ff8b9SJimmy Huang uint32_t ret; 561a1ff8b9SJimmy Huang 571a1ff8b9SJimmy Huang ret = mtcmos_non_cpu_ctrl(0, val); 581a1ff8b9SJimmy Huang if (ret) 591a1ff8b9SJimmy Huang return MTK_SIP_E_INVALID_PARAM; 601a1ff8b9SJimmy Huang else 611a1ff8b9SJimmy Huang return MTK_SIP_E_SUCCESS; 621a1ff8b9SJimmy Huang } 631a1ff8b9SJimmy Huang 64b659b1a7SJimmy Huang static uint64_t mt_sip_pwr_mtcmos_support(void) 651a1ff8b9SJimmy Huang { 661a1ff8b9SJimmy Huang return MTK_SIP_E_SUCCESS; 671a1ff8b9SJimmy Huang } 68b659b1a7SJimmy Huang 69b659b1a7SJimmy Huang uint64_t mediatek_plat_sip_handler(uint32_t smc_fid, 70b659b1a7SJimmy Huang uint64_t x1, 71b659b1a7SJimmy Huang uint64_t x2, 72b659b1a7SJimmy Huang uint64_t x3, 73b659b1a7SJimmy Huang uint64_t x4, 74b659b1a7SJimmy Huang void *cookie, 75b659b1a7SJimmy Huang void *handle, 76b659b1a7SJimmy Huang uint64_t flags) 77b659b1a7SJimmy Huang { 78b659b1a7SJimmy Huang uint64_t ret; 79b659b1a7SJimmy Huang 80b659b1a7SJimmy Huang switch (smc_fid) { 81b659b1a7SJimmy Huang case MTK_SIP_PWR_ON_MTCMOS: 82b659b1a7SJimmy Huang ret = mt_sip_pwr_on_mtcmos((uint32_t)x1); 83b659b1a7SJimmy Huang SMC_RET1(handle, ret); 84b659b1a7SJimmy Huang 85b659b1a7SJimmy Huang case MTK_SIP_PWR_OFF_MTCMOS: 86b659b1a7SJimmy Huang ret = mt_sip_pwr_off_mtcmos((uint32_t)x1); 87b659b1a7SJimmy Huang SMC_RET1(handle, ret); 88b659b1a7SJimmy Huang 89b659b1a7SJimmy Huang case MTK_SIP_PWR_MTCMOS_SUPPORT: 90b659b1a7SJimmy Huang ret = mt_sip_pwr_mtcmos_support(); 91b659b1a7SJimmy Huang SMC_RET1(handle, ret); 92b659b1a7SJimmy Huang 937ace1cc0SYi Zheng case MTK_SIP_SET_HDCP_KEY_EX: 947ace1cc0SYi Zheng ret = crypt_set_hdcp_key_ex(x1, x2, x3); 957ace1cc0SYi Zheng SMC_RET1(handle, ret); 967ace1cc0SYi Zheng 977ace1cc0SYi Zheng case MTK_SIP_SET_HDCP_KEY_NUM: 987ace1cc0SYi Zheng ret = crypt_set_hdcp_key_num((uint32_t)x1); 997ace1cc0SYi Zheng SMC_RET1(handle, ret); 1007ace1cc0SYi Zheng 1017ace1cc0SYi Zheng case MTK_SIP_CLR_HDCP_KEY: 1027ace1cc0SYi Zheng ret = crypt_clear_hdcp_key(); 1037ace1cc0SYi Zheng SMC_RET1(handle, ret); 1047ace1cc0SYi Zheng 105b659b1a7SJimmy Huang default: 106b659b1a7SJimmy Huang ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); 107b659b1a7SJimmy Huang break; 108b659b1a7SJimmy Huang } 109b659b1a7SJimmy Huang 110b659b1a7SJimmy Huang SMC_RET1(handle, SMC_UNK); 111b659b1a7SJimmy Huang } 112