17d116dccSCC Ma /* 2ed81f3ebSSandrine Bailleux * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 37d116dccSCC Ma * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 57d116dccSCC Ma */ 6*b8424642SAntonio Nino Diaz 77d116dccSCC Ma #include <bl_common.h> 87d116dccSCC Ma #include <mt8173_def.h> 9ed81f3ebSSandrine Bailleux #include <utils.h> 107d116dccSCC Ma 117d116dccSCC Ma const unsigned int mt_irq_sec_array[] = { 127d116dccSCC Ma MT_IRQ_SEC_SGI_0, 137d116dccSCC Ma MT_IRQ_SEC_SGI_1, 147d116dccSCC Ma MT_IRQ_SEC_SGI_2, 157d116dccSCC Ma MT_IRQ_SEC_SGI_3, 167d116dccSCC Ma MT_IRQ_SEC_SGI_4, 177d116dccSCC Ma MT_IRQ_SEC_SGI_5, 187d116dccSCC Ma MT_IRQ_SEC_SGI_6, 197d116dccSCC Ma MT_IRQ_SEC_SGI_7 207d116dccSCC Ma }; 217d116dccSCC Ma 227d116dccSCC Ma void plat_mt_gic_init(void) 237d116dccSCC Ma { 247d116dccSCC Ma arm_gic_init(BASE_GICC_BASE, 257d116dccSCC Ma BASE_GICD_BASE, 267d116dccSCC Ma BASE_GICR_BASE, 277d116dccSCC Ma mt_irq_sec_array, 287d116dccSCC Ma ARRAY_SIZE(mt_irq_sec_array)); 297d116dccSCC Ma } 30