xref: /rk3399_ARM-atf/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.c (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
17d116dccSCC Ma /*
27d116dccSCC Ma  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
37d116dccSCC Ma  *
4*82cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
57d116dccSCC Ma  */
67d116dccSCC Ma #include <arch_helpers.h>
77d116dccSCC Ma #include <mcucfg.h>
87d116dccSCC Ma #include <mmio.h>
97d116dccSCC Ma #include <mt8173_def.h>
107d116dccSCC Ma #include <mt_cpuxgpt.h>
117d116dccSCC Ma 
127d116dccSCC Ma static void write_cpuxgpt(unsigned int reg_index, unsigned int value)
137d116dccSCC Ma {
147d116dccSCC Ma 	mmio_write_32((uintptr_t)&mt8173_mcucfg->xgpt_idx, reg_index);
157d116dccSCC Ma 	mmio_write_32((uintptr_t)&mt8173_mcucfg->xgpt_ctl, value);
167d116dccSCC Ma }
177d116dccSCC Ma 
187d116dccSCC Ma static void cpuxgpt_set_init_cnt(unsigned int countH, unsigned int countL)
197d116dccSCC Ma {
207d116dccSCC Ma 	write_cpuxgpt(INDEX_CNT_H_INIT, countH);
217d116dccSCC Ma 	/* update count when countL programmed */
227d116dccSCC Ma 	write_cpuxgpt(INDEX_CNT_L_INIT, countL);
237d116dccSCC Ma }
247d116dccSCC Ma 
257d116dccSCC Ma void generic_timer_backup(void)
267d116dccSCC Ma {
277d116dccSCC Ma 	uint64_t cval;
287d116dccSCC Ma 
297d116dccSCC Ma 	cval = read_cntpct_el0();
307d116dccSCC Ma 	cpuxgpt_set_init_cnt((uint32_t)(cval >> 32),
317d116dccSCC Ma 			       (uint32_t)(cval & 0xffffffff));
327d116dccSCC Ma }
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