xref: /rk3399_ARM-atf/plat/mediatek/mt8173/drivers/rtc/rtc.h (revision 51faada71a219a8b94cd8d8e423f0f22e9da4d8f)
1 /*
2  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __PLAT_DRIVER_RTC_H__
32 #define __PLAT_DRIVER_RTC_H__
33 
34 /* RTC registers */
35 enum {
36 	RTC_BBPU = 0xE000,
37 	RTC_IRQ_STA = 0xE002,
38 	RTC_IRQ_EN = 0xE004,
39 	RTC_CII_EN = 0xE006
40 };
41 
42 enum {
43 	RTC_OSC32CON = 0xE026,
44 	RTC_CON = 0xE03E,
45 	RTC_WRTGR = 0xE03C
46 };
47 
48 enum {
49 	RTC_PDN1 = 0xE02C,
50 	RTC_PDN2 = 0xE02E,
51 	RTC_SPAR0 = 0xE030,
52 	RTC_SPAR1 = 0xE032,
53 	RTC_PROT = 0xE036,
54 	RTC_DIFF = 0xE038,
55 	RTC_CALI = 0xE03A
56 };
57 
58 enum {
59 	RTC_PROT_UNLOCK1 = 0x586A,
60 	RTC_PROT_UNLOCK2 = 0x9136
61 };
62 
63 enum {
64 	RTC_BBPU_PWREN	= 1U << 0,
65 	RTC_BBPU_BBPU	= 1U << 2,
66 	RTC_BBPU_AUTO	= 1U << 3,
67 	RTC_BBPU_CLRPKY	= 1U << 4,
68 	RTC_BBPU_RELOAD	= 1U << 5,
69 	RTC_BBPU_CBUSY	= 1U << 6
70 };
71 
72 enum {
73 	RTC_BBPU_KEY	= 0x43 << 8
74 };
75 
76 void rtc_bbpu_power_down(void);
77 
78 #endif /* __PLAT_DRIVER_RTC_H__ */
79