1*7d116dccSCC Ma /* 2*7d116dccSCC Ma * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*7d116dccSCC Ma * 4*7d116dccSCC Ma * Redistribution and use in source and binary forms, with or without 5*7d116dccSCC Ma * modification, are permitted provided that the following conditions are met: 6*7d116dccSCC Ma * 7*7d116dccSCC Ma * Redistributions of source code must retain the above copyright notice, this 8*7d116dccSCC Ma * list of conditions and the following disclaimer. 9*7d116dccSCC Ma * 10*7d116dccSCC Ma * Redistributions in binary form must reproduce the above copyright notice, 11*7d116dccSCC Ma * this list of conditions and the following disclaimer in the documentation 12*7d116dccSCC Ma * and/or other materials provided with the distribution. 13*7d116dccSCC Ma * 14*7d116dccSCC Ma * Neither the name of ARM nor the names of its contributors may be used 15*7d116dccSCC Ma * to endorse or promote products derived from this software without specific 16*7d116dccSCC Ma * prior written permission. 17*7d116dccSCC Ma * 18*7d116dccSCC Ma * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*7d116dccSCC Ma * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*7d116dccSCC Ma * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*7d116dccSCC Ma * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*7d116dccSCC Ma * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*7d116dccSCC Ma * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*7d116dccSCC Ma * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*7d116dccSCC Ma * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*7d116dccSCC Ma * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*7d116dccSCC Ma * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*7d116dccSCC Ma * POSSIBILITY OF SUCH DAMAGE. 29*7d116dccSCC Ma */ 30*7d116dccSCC Ma 31*7d116dccSCC Ma #ifndef __PLAT_DRIVER_RTC_H__ 32*7d116dccSCC Ma #define __PLAT_DRIVER_RTC_H__ 33*7d116dccSCC Ma 34*7d116dccSCC Ma /* RTC registers */ 35*7d116dccSCC Ma enum { 36*7d116dccSCC Ma RTC_BBPU = 0xE000, 37*7d116dccSCC Ma RTC_IRQ_STA = 0xE002, 38*7d116dccSCC Ma RTC_IRQ_EN = 0xE004, 39*7d116dccSCC Ma RTC_CII_EN = 0xE006 40*7d116dccSCC Ma }; 41*7d116dccSCC Ma 42*7d116dccSCC Ma enum { 43*7d116dccSCC Ma RTC_OSC32CON = 0xE026, 44*7d116dccSCC Ma RTC_CON = 0xE03E, 45*7d116dccSCC Ma RTC_WRTGR = 0xE03C 46*7d116dccSCC Ma }; 47*7d116dccSCC Ma 48*7d116dccSCC Ma enum { 49*7d116dccSCC Ma RTC_PDN1 = 0xE02C, 50*7d116dccSCC Ma RTC_PDN2 = 0xE02E, 51*7d116dccSCC Ma RTC_SPAR0 = 0xE030, 52*7d116dccSCC Ma RTC_SPAR1 = 0xE032, 53*7d116dccSCC Ma RTC_PROT = 0xE036, 54*7d116dccSCC Ma RTC_DIFF = 0xE038, 55*7d116dccSCC Ma RTC_CALI = 0xE03A 56*7d116dccSCC Ma }; 57*7d116dccSCC Ma 58*7d116dccSCC Ma enum { 59*7d116dccSCC Ma RTC_PROT_UNLOCK1 = 0x586A, 60*7d116dccSCC Ma RTC_PROT_UNLOCK2 = 0x9136 61*7d116dccSCC Ma }; 62*7d116dccSCC Ma 63*7d116dccSCC Ma enum { 64*7d116dccSCC Ma RTC_BBPU_PWREN = 1U << 0, 65*7d116dccSCC Ma RTC_BBPU_BBPU = 1U << 2, 66*7d116dccSCC Ma RTC_BBPU_AUTO = 1U << 3, 67*7d116dccSCC Ma RTC_BBPU_CLRPKY = 1U << 4, 68*7d116dccSCC Ma RTC_BBPU_RELOAD = 1U << 5, 69*7d116dccSCC Ma RTC_BBPU_CBUSY = 1U << 6 70*7d116dccSCC Ma }; 71*7d116dccSCC Ma 72*7d116dccSCC Ma enum { 73*7d116dccSCC Ma RTC_BBPU_KEY = 0x43 << 8 74*7d116dccSCC Ma }; 75*7d116dccSCC Ma 76*7d116dccSCC Ma void rtc_bbpu_power_down(void); 77*7d116dccSCC Ma 78*7d116dccSCC Ma #endif /* __PLAT_DRIVER_RTC_H__ */ 79