xref: /rk3399_ARM-atf/plat/mediatek/mt8173/drivers/crypt/crypt.c (revision 9a207532f8216bf83fed0891fed9ed0bc72ca450)
17ace1cc0SYi Zheng /*
27ace1cc0SYi Zheng  * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
37ace1cc0SYi Zheng  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
57ace1cc0SYi Zheng  */
6*09d40e0eSAntonio Nino Diaz 
7*09d40e0eSAntonio Nino Diaz #include <assert.h>
8*09d40e0eSAntonio Nino Diaz 
97ace1cc0SYi Zheng #include <arch.h>
107ace1cc0SYi Zheng #include <arch_helpers.h>
11*09d40e0eSAntonio Nino Diaz #include <common/debug.h>
12*09d40e0eSAntonio Nino Diaz #include <drivers/delay_timer.h>
13*09d40e0eSAntonio Nino Diaz #include <lib/mmio.h>
14*09d40e0eSAntonio Nino Diaz 
157ace1cc0SYi Zheng #include <mt8173_def.h>
167ace1cc0SYi Zheng #include <mtk_sip_svc.h>
177ace1cc0SYi Zheng 
187ace1cc0SYi Zheng #define crypt_read32(offset)	\
197ace1cc0SYi Zheng 	mmio_read_32((uintptr_t)(CRYPT_BASE+((offset) * 4)))
207ace1cc0SYi Zheng 
217ace1cc0SYi Zheng #define crypt_write32(offset, value)    \
227ace1cc0SYi Zheng 	mmio_write_32((uintptr_t)(CRYPT_BASE + ((offset) * 4)), (uint32_t)value)
237ace1cc0SYi Zheng 
247ace1cc0SYi Zheng #define GET_L32(x) ((uint32_t)(x & 0xffffffff))
257ace1cc0SYi Zheng #define GET_H32(x) ((uint32_t)((x >> 32) & 0xffffffff))
267ace1cc0SYi Zheng 
277ace1cc0SYi Zheng #define REG_INIT 0
287ace1cc0SYi Zheng #define REG_MSC 4
297ace1cc0SYi Zheng #define REG_TRIG 256
307ace1cc0SYi Zheng #define REG_STAT 512
317ace1cc0SYi Zheng #define REG_CLR 513
327ace1cc0SYi Zheng #define REG_INT 514
337ace1cc0SYi Zheng #define REG_P68 768
347ace1cc0SYi Zheng #define REG_P69 769
357ace1cc0SYi Zheng #define REG_P70 770
367ace1cc0SYi Zheng #define REG_P71 771
377ace1cc0SYi Zheng #define REG_P72 772
387ace1cc0SYi Zheng #define REG_D20 820
397ace1cc0SYi Zheng #define KEY_SIZE 160
407ace1cc0SYi Zheng #define KEY_LEN 40
417ace1cc0SYi Zheng 
427ace1cc0SYi Zheng /* Wait until crypt is completed */
crypt_wait(void)437ace1cc0SYi Zheng uint64_t crypt_wait(void)
447ace1cc0SYi Zheng {
457ace1cc0SYi Zheng 	crypt_write32(REG_TRIG, 0);
467ace1cc0SYi Zheng 	while (crypt_read32(REG_STAT) == 0)
477ace1cc0SYi Zheng 		;
487ace1cc0SYi Zheng 	udelay(100);
497ace1cc0SYi Zheng 	crypt_write32(REG_CLR, crypt_read32(REG_STAT));
507ace1cc0SYi Zheng 	crypt_write32(REG_INT, 0);
517ace1cc0SYi Zheng 	return MTK_SIP_E_SUCCESS;
527ace1cc0SYi Zheng }
537ace1cc0SYi Zheng 
547ace1cc0SYi Zheng static uint32_t record[4];
557ace1cc0SYi Zheng /* Copy encrypted key to crypt engine */
crypt_set_hdcp_key_ex(uint64_t x1,uint64_t x2,uint64_t x3)567ace1cc0SYi Zheng uint64_t crypt_set_hdcp_key_ex(uint64_t x1, uint64_t x2, uint64_t x3)
577ace1cc0SYi Zheng {
587ace1cc0SYi Zheng 	uint32_t i = (uint32_t)x1;
597ace1cc0SYi Zheng 	uint32_t j = 0;
607ace1cc0SYi Zheng 
617ace1cc0SYi Zheng 	if (i > KEY_LEN)
627ace1cc0SYi Zheng 		return MTK_SIP_E_INVALID_PARAM;
637ace1cc0SYi Zheng 
647ace1cc0SYi Zheng 	if (i < KEY_LEN) {
657ace1cc0SYi Zheng 		crypt_write32(REG_MSC, 0x80ff3800);
667ace1cc0SYi Zheng 		crypt_write32(REG_INIT, 0);
677ace1cc0SYi Zheng 		crypt_write32(REG_INIT, 0xF);
687ace1cc0SYi Zheng 		crypt_write32(REG_CLR, 1);
697ace1cc0SYi Zheng 		crypt_write32(REG_INT, 0);
707ace1cc0SYi Zheng 
717ace1cc0SYi Zheng 		crypt_write32(REG_P68, 0x70);
727ace1cc0SYi Zheng 		crypt_write32(REG_P69, 0x1C0);
737ace1cc0SYi Zheng 		crypt_write32(REG_P70, 0x30);
747ace1cc0SYi Zheng 		crypt_write32(REG_P71, 0x4);
757ace1cc0SYi Zheng 		crypt_wait();
767ace1cc0SYi Zheng 
777ace1cc0SYi Zheng 		crypt_write32(REG_D20 + 4 * i, GET_L32(x2));
787ace1cc0SYi Zheng 		crypt_write32(REG_D20 + 4 * i + 1, GET_H32(x2));
797ace1cc0SYi Zheng 		crypt_write32(REG_D20 + 4 * i + 2, GET_L32(x3));
807ace1cc0SYi Zheng 		crypt_write32(REG_D20 + 4 * i + 3, GET_H32(x3));
817ace1cc0SYi Zheng 
827ace1cc0SYi Zheng 		crypt_write32(REG_P69, 0);
837ace1cc0SYi Zheng 		crypt_write32(REG_P68, 0x20);
847ace1cc0SYi Zheng 		crypt_write32(REG_P71, 0x34 + 4 * i);
857ace1cc0SYi Zheng 		crypt_write32(REG_P72, 0x34 + 4 * i);
867ace1cc0SYi Zheng 		crypt_wait();
877ace1cc0SYi Zheng 
887ace1cc0SYi Zheng 		for (j = 0; j < 4; j++) {
897ace1cc0SYi Zheng 			crypt_write32(REG_P68, 0x71);
907ace1cc0SYi Zheng 			crypt_write32(REG_P69, 0x34 + 4 * i + j);
917ace1cc0SYi Zheng 			crypt_write32(REG_P70, record[j]);
927ace1cc0SYi Zheng 			crypt_wait();
937ace1cc0SYi Zheng 		}
947ace1cc0SYi Zheng 	}
957ace1cc0SYi Zheng 	/* Prepare data for next iteration */
967ace1cc0SYi Zheng 	record[0] = GET_L32(x2);
977ace1cc0SYi Zheng 	record[1] = GET_H32(x2);
987ace1cc0SYi Zheng 	record[2] = GET_L32(x3);
997ace1cc0SYi Zheng 	record[3] = GET_H32(x3);
1007ace1cc0SYi Zheng 	return MTK_SIP_E_SUCCESS;
1017ace1cc0SYi Zheng }
1027ace1cc0SYi Zheng 
1037ace1cc0SYi Zheng /* Set key to hdcp */
crypt_set_hdcp_key_num(uint32_t num)1047ace1cc0SYi Zheng uint64_t crypt_set_hdcp_key_num(uint32_t num)
1057ace1cc0SYi Zheng {
1067ace1cc0SYi Zheng 	if (num > KEY_LEN)
1077ace1cc0SYi Zheng 		return MTK_SIP_E_INVALID_PARAM;
1087ace1cc0SYi Zheng 
1097ace1cc0SYi Zheng 	crypt_write32(REG_P68, 0x6A);
1107ace1cc0SYi Zheng 	crypt_write32(REG_P69, 0x34 + 4 * num);
1117ace1cc0SYi Zheng 	crypt_wait();
1127ace1cc0SYi Zheng 	return MTK_SIP_E_SUCCESS;
1137ace1cc0SYi Zheng }
1147ace1cc0SYi Zheng 
1157ace1cc0SYi Zheng /* Clear key in crypt engine */
crypt_clear_hdcp_key(void)1167ace1cc0SYi Zheng uint64_t crypt_clear_hdcp_key(void)
1177ace1cc0SYi Zheng {
1187ace1cc0SYi Zheng 	uint32_t i;
1197ace1cc0SYi Zheng 
1207ace1cc0SYi Zheng 	for (i = 0; i < KEY_SIZE; i++)
1217ace1cc0SYi Zheng 		crypt_write32(REG_D20 + i, 0);
1227ace1cc0SYi Zheng 	return MTK_SIP_E_SUCCESS;
1237ace1cc0SYi Zheng }
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