xref: /rk3399_ARM-atf/plat/mediatek/mt8173/aarch64/plat_helpers.S (revision 9400b40ea4c71153a63c1f1cdaa416d45a325ec5)
17d116dccSCC Ma/*
27d116dccSCC Ma * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
37d116dccSCC Ma *
47d116dccSCC Ma * Redistribution and use in source and binary forms, with or without
57d116dccSCC Ma * modification, are permitted provided that the following conditions are met:
67d116dccSCC Ma *
77d116dccSCC Ma * Redistributions of source code must retain the above copyright notice, this
87d116dccSCC Ma * list of conditions and the following disclaimer.
97d116dccSCC Ma *
107d116dccSCC Ma * Redistributions in binary form must reproduce the above copyright notice,
117d116dccSCC Ma * this list of conditions and the following disclaimer in the documentation
127d116dccSCC Ma * and/or other materials provided with the distribution.
137d116dccSCC Ma *
147d116dccSCC Ma * Neither the name of ARM nor the names of its contributors may be used
157d116dccSCC Ma * to endorse or promote products derived from this software without specific
167d116dccSCC Ma * prior written permission.
177d116dccSCC Ma *
187d116dccSCC Ma * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
197d116dccSCC Ma * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
207d116dccSCC Ma * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
217d116dccSCC Ma * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
227d116dccSCC Ma * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
237d116dccSCC Ma * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
247d116dccSCC Ma * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
257d116dccSCC Ma * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
267d116dccSCC Ma * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
277d116dccSCC Ma * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
287d116dccSCC Ma * POSSIBILITY OF SUCH DAMAGE.
297d116dccSCC Ma */
307d116dccSCC Ma#include <arch.h>
317d116dccSCC Ma#include <asm_macros.S>
327d116dccSCC Ma#include <mt8173_def.h>
337d116dccSCC Ma
347d116dccSCC Ma	.globl	plat_secondary_cold_boot_setup
357d116dccSCC Ma	.globl	plat_report_exception
367d116dccSCC Ma	.globl	platform_is_primary_cpu
377d116dccSCC Ma	.globl	plat_crash_console_init
387d116dccSCC Ma	.globl	plat_crash_console_putc
397d116dccSCC Ma
407d116dccSCC Ma	/* -----------------------------------------------------
417d116dccSCC Ma	 * void plat_secondary_cold_boot_setup (void);
427d116dccSCC Ma	 *
437d116dccSCC Ma	 * This function performs any platform specific actions
447d116dccSCC Ma	 * needed for a secondary cpu after a cold reset e.g
457d116dccSCC Ma	 * mark the cpu's presence, mechanism to place it in a
467d116dccSCC Ma	 * holding pen etc.
477d116dccSCC Ma	 * -----------------------------------------------------
487d116dccSCC Ma	 */
497d116dccSCC Mafunc plat_secondary_cold_boot_setup
507d116dccSCC Ma	/* MT8173 Oak does not do cold boot for secondary CPU */
517d116dccSCC Macb_panic:
527d116dccSCC Ma	b	cb_panic
537d116dccSCC Maendfunc plat_secondary_cold_boot_setup
547d116dccSCC Ma
557d116dccSCC Mafunc platform_is_primary_cpu
567d116dccSCC Ma	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
577d116dccSCC Ma	cmp	x0, #MT8173_PRIMARY_CPU
587d116dccSCC Ma	cset	x0, eq
597d116dccSCC Ma	ret
607d116dccSCC Maendfunc platform_is_primary_cpu
617d116dccSCC Ma
627d116dccSCC Ma	/* ---------------------------------------------
637d116dccSCC Ma	 * int plat_crash_console_init(void)
647d116dccSCC Ma	 * Function to initialize the crash console
657d116dccSCC Ma	 * without a C Runtime to print crash report.
66*9400b40eSJuan Castillo	 * Clobber list : x0 - x4
677d116dccSCC Ma	 * ---------------------------------------------
687d116dccSCC Ma	 */
697d116dccSCC Mafunc plat_crash_console_init
707d116dccSCC Ma	mov_imm	x0, MT8173_UART0_BASE
717d116dccSCC Ma	mov_imm	x1, MT8173_UART_CLOCK
727d116dccSCC Ma	mov_imm	x2, MT8173_BAUDRATE
737d116dccSCC Ma	b	console_core_init
747d116dccSCC Maendfunc plat_crash_console_init
757d116dccSCC Ma
767d116dccSCC Ma	/* ---------------------------------------------
777d116dccSCC Ma	 * int plat_crash_console_putc(void)
787d116dccSCC Ma	 * Function to print a character on the crash
797d116dccSCC Ma	 * console without a C Runtime.
807d116dccSCC Ma	 * Clobber list : x1, x2
817d116dccSCC Ma	 * ---------------------------------------------
827d116dccSCC Ma	 */
837d116dccSCC Mafunc plat_crash_console_putc
847d116dccSCC Ma	mov_imm x1, MT8173_UART0_BASE
857d116dccSCC Ma	b	console_core_putc
867d116dccSCC Maendfunc plat_crash_console_putc
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