17d116dccSCC Ma/* 2*2cc97771SAmbroise Vincent * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 37d116dccSCC Ma * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 57d116dccSCC Ma */ 67d116dccSCC Ma#include <arch.h> 77d116dccSCC Ma#include <asm_macros.S> 87d116dccSCC Ma#include <mt8173_def.h> 97d116dccSCC Ma 107d116dccSCC Ma .globl plat_secondary_cold_boot_setup 117d116dccSCC Ma .globl plat_report_exception 127d116dccSCC Ma .globl platform_is_primary_cpu 133fc26aa0SKoan-Sin Tan .globl plat_my_core_pos 147d116dccSCC Ma .globl plat_crash_console_init 157d116dccSCC Ma .globl plat_crash_console_putc 16*2cc97771SAmbroise Vincent .globl plat_crash_console_flush 177d116dccSCC Ma 187d116dccSCC Ma /* ----------------------------------------------------- 197d116dccSCC Ma * void plat_secondary_cold_boot_setup (void); 207d116dccSCC Ma * 217d116dccSCC Ma * This function performs any platform specific actions 227d116dccSCC Ma * needed for a secondary cpu after a cold reset e.g 237d116dccSCC Ma * mark the cpu's presence, mechanism to place it in a 247d116dccSCC Ma * holding pen etc. 257d116dccSCC Ma * ----------------------------------------------------- 267d116dccSCC Ma */ 277d116dccSCC Mafunc plat_secondary_cold_boot_setup 287d116dccSCC Ma /* MT8173 Oak does not do cold boot for secondary CPU */ 297d116dccSCC Macb_panic: 307d116dccSCC Ma b cb_panic 317d116dccSCC Maendfunc plat_secondary_cold_boot_setup 327d116dccSCC Ma 337d116dccSCC Mafunc platform_is_primary_cpu 347d116dccSCC Ma and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 357d116dccSCC Ma cmp x0, #MT8173_PRIMARY_CPU 367d116dccSCC Ma cset x0, eq 377d116dccSCC Ma ret 387d116dccSCC Maendfunc platform_is_primary_cpu 397d116dccSCC Ma 403fc26aa0SKoan-Sin Tan /* ----------------------------------------------------- 413fc26aa0SKoan-Sin Tan * unsigned int plat_my_core_pos(void); 423fc26aa0SKoan-Sin Tan * 433fc26aa0SKoan-Sin Tan * result: CorePos = CoreId + (ClusterId << 2) 443fc26aa0SKoan-Sin Tan * ----------------------------------------------------- 453fc26aa0SKoan-Sin Tan */ 463fc26aa0SKoan-Sin Tanfunc plat_my_core_pos 473fc26aa0SKoan-Sin Tan mrs x0, mpidr_el1 483fc26aa0SKoan-Sin Tan and x1, x0, #MPIDR_CPU_MASK 493fc26aa0SKoan-Sin Tan and x0, x0, #MPIDR_CLUSTER_MASK 503fc26aa0SKoan-Sin Tan add x0, x1, x0, LSR #6 513fc26aa0SKoan-Sin Tan ret 523fc26aa0SKoan-Sin Tanendfunc plat_my_core_pos 533fc26aa0SKoan-Sin Tan 547d116dccSCC Ma /* --------------------------------------------- 557d116dccSCC Ma * int plat_crash_console_init(void) 567d116dccSCC Ma * Function to initialize the crash console 577d116dccSCC Ma * without a C Runtime to print crash report. 589400b40eSJuan Castillo * Clobber list : x0 - x4 597d116dccSCC Ma * --------------------------------------------- 607d116dccSCC Ma */ 617d116dccSCC Mafunc plat_crash_console_init 627d116dccSCC Ma mov_imm x0, MT8173_UART0_BASE 637d116dccSCC Ma mov_imm x1, MT8173_UART_CLOCK 647d116dccSCC Ma mov_imm x2, MT8173_BAUDRATE 657d116dccSCC Ma b console_core_init 667d116dccSCC Maendfunc plat_crash_console_init 677d116dccSCC Ma 687d116dccSCC Ma /* --------------------------------------------- 697d116dccSCC Ma * int plat_crash_console_putc(void) 707d116dccSCC Ma * Function to print a character on the crash 717d116dccSCC Ma * console without a C Runtime. 727d116dccSCC Ma * Clobber list : x1, x2 737d116dccSCC Ma * --------------------------------------------- 747d116dccSCC Ma */ 757d116dccSCC Mafunc plat_crash_console_putc 767d116dccSCC Ma mov_imm x1, MT8173_UART0_BASE 777d116dccSCC Ma b console_core_putc 787d116dccSCC Maendfunc plat_crash_console_putc 79*2cc97771SAmbroise Vincent 80*2cc97771SAmbroise Vincent /* --------------------------------------------- 81*2cc97771SAmbroise Vincent * int plat_crash_console_flush(int c) 82*2cc97771SAmbroise Vincent * Function to force a write of all buffered 83*2cc97771SAmbroise Vincent * data that hasn't been output. 84*2cc97771SAmbroise Vincent * Out : return -1 on error else return 0. 85*2cc97771SAmbroise Vincent * Clobber list : x0, x1 86*2cc97771SAmbroise Vincent * --------------------------------------------- 87*2cc97771SAmbroise Vincent */ 88*2cc97771SAmbroise Vincentfunc plat_crash_console_flush 89*2cc97771SAmbroise Vincent mov_imm x0, MT8173_UART0_BASE 90*2cc97771SAmbroise Vincent b console_core_flush 91*2cc97771SAmbroise Vincentendfunc plat_crash_console_flush 92