1a72b9e77SRex-BC Chen /* 2*22d74da7SYidi Lin * Copyright (c) 2022-2025, MediaTek Inc. All rights reserved. 3a72b9e77SRex-BC Chen * 4a72b9e77SRex-BC Chen * SPDX-License-Identifier: BSD-3-Clause 5a72b9e77SRex-BC Chen */ 6a72b9e77SRex-BC Chen 7a72b9e77SRex-BC Chen #include <assert.h> 8*22d74da7SYidi Lin 9a72b9e77SRex-BC Chen #include <arch_helpers.h> 10a72b9e77SRex-BC Chen #include <common/debug.h> 11*22d74da7SYidi Lin #include <drivers/delay_timer.h> 12a72b9e77SRex-BC Chen #include <drivers/gpio.h> 13*22d74da7SYidi Lin #if CONFIG_MTK_PMIC_SHUTDOWN_CFG 14*22d74da7SYidi Lin #include <drivers/pmic/pmic_psc.h> 15*22d74da7SYidi Lin #endif 16a72b9e77SRex-BC Chen #include <lib/mtk_init/mtk_init.h> 17a72b9e77SRex-BC Chen #include <lib/pm/mtk_pm.h> 18a72b9e77SRex-BC Chen #include <plat_params.h> 19*22d74da7SYidi Lin #if !CONFIG_MTK_PMIC_SHUTDOWN_CFG 20a72b9e77SRex-BC Chen #include <pmic.h> 21a72b9e77SRex-BC Chen #include <rtc.h> 22*22d74da7SYidi Lin #endif 23a72b9e77SRex-BC Chen mtk_system_reset_cros(void)24a72b9e77SRex-BC Chenstatic void __dead2 mtk_system_reset_cros(void) 25a72b9e77SRex-BC Chen { 26a72b9e77SRex-BC Chen struct bl_aux_gpio_info *gpio_reset = plat_get_mtk_gpio_reset(); 27a72b9e77SRex-BC Chen 28a72b9e77SRex-BC Chen INFO("MTK System Reset\n"); 29a72b9e77SRex-BC Chen 30a72b9e77SRex-BC Chen gpio_set_value(gpio_reset->index, gpio_reset->polarity); 31a72b9e77SRex-BC Chen 32a72b9e77SRex-BC Chen wfi(); 33a72b9e77SRex-BC Chen ERROR("MTK System Reset: operation not handled.\n"); 34a72b9e77SRex-BC Chen panic(); 35a72b9e77SRex-BC Chen } 36a72b9e77SRex-BC Chen mtk_system_off_cros(void)37a72b9e77SRex-BC Chenstatic void __dead2 mtk_system_off_cros(void) 38a72b9e77SRex-BC Chen { 39a72b9e77SRex-BC Chen INFO("MTK System Off\n"); 40a72b9e77SRex-BC Chen 41*22d74da7SYidi Lin #if CONFIG_MTK_PMIC_SHUTDOWN_CFG 42*22d74da7SYidi Lin platform_power_hold(false); 43*22d74da7SYidi Lin mdelay(1000); 44*22d74da7SYidi Lin #else 45a72b9e77SRex-BC Chen rtc_power_off_sequence(); 46a72b9e77SRex-BC Chen pmic_power_off(); 47*22d74da7SYidi Lin #endif 48a72b9e77SRex-BC Chen 49a72b9e77SRex-BC Chen wfi(); 50a72b9e77SRex-BC Chen ERROR("MTK System Off: operation not handled.\n"); 51a72b9e77SRex-BC Chen panic(); 52a72b9e77SRex-BC Chen } 53a72b9e77SRex-BC Chen 54a72b9e77SRex-BC Chen static struct plat_pm_reset_ctrl lib_reset_ctrl = { 55a72b9e77SRex-BC Chen .system_off = mtk_system_off_cros, 56a72b9e77SRex-BC Chen .system_reset = mtk_system_reset_cros, 57a72b9e77SRex-BC Chen .system_reset2 = NULL, 58a72b9e77SRex-BC Chen }; 59a72b9e77SRex-BC Chen lib_reset_ctrl_init(void)60a72b9e77SRex-BC Chenstatic int lib_reset_ctrl_init(void) 61a72b9e77SRex-BC Chen { 62a72b9e77SRex-BC Chen INFO("Reset init\n"); 63a72b9e77SRex-BC Chen 64a72b9e77SRex-BC Chen plat_pm_ops_setup_reset(&lib_reset_ctrl); 65a72b9e77SRex-BC Chen 66a72b9e77SRex-BC Chen return 0; 67a72b9e77SRex-BC Chen } 68a72b9e77SRex-BC Chen MTK_ARCH_INIT(lib_reset_ctrl_init); 69