1 /* 2 * Copyright (c) 2025, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __MTK_BL31_INTERFACE_H__ 8 #define __MTK_BL31_INTERFACE_H__ 9 10 #include <stdbool.h> 11 #include <stddef.h> 12 #include <stdint.h> 13 14 enum mtk_bl31_status { 15 MTK_BL31_STATUS_SUCCESS = 0, 16 MTK_BL31_STATUS_INVALID_PARAM = -1, 17 MTK_BL31_STATUS_NOT_SUPPORTED = -2, 18 MTK_BL31_STATUS_INVALID_RANGE = -3, 19 MTK_BL31_STATUS_PERMISSION_DENY = -4, 20 MTK_BL31_STATUS_LOCK_FAIL = -5, 21 }; 22 23 int mtk_bl31_map_to_sip_error(enum mtk_bl31_status status); 24 25 enum mtk_bl31_memory_type { 26 MTK_BL31_DEV_RW_SEC = 0, 27 }; 28 29 int mtk_bl31_mmap_add_dynamic_region(unsigned long long base_pa, size_t size, 30 enum mtk_bl31_memory_type attr); 31 int mtk_bl31_mmap_remove_dynamic_region(uintptr_t base_va, size_t size); 32 33 /* UFS definitions */ 34 enum ufs_mtk_mphy_op { 35 UFS_MPHY_BACKUP = 0, 36 UFS_MPHY_RESTORE, 37 }; 38 39 enum ufs_notify_change_status { 40 PRE_CHANGE, 41 POST_CHANGE, 42 }; 43 44 /* UFS interfaces */ 45 void ufs_mphy_va09_cg_ctrl(bool enable); 46 void ufs_device_reset_ctrl(bool rst_n); 47 void ufs_crypto_hie_init(void); 48 void ufs_ref_clk_status(uint32_t on, enum ufs_notify_change_status stage); 49 void ufs_sram_pwr_ctrl(bool on); 50 void ufs_device_pwr_ctrl(bool vcc_on, uint64_t ufs_version); 51 void ufs_mphy_ctrl(enum ufs_mtk_mphy_op op); 52 void ufs_mtcmos_ctrl(bool on); 53 54 /* UFS functions implemented in the public ATF repo */ 55 int ufs_rsc_ctrl_mem(bool hold); 56 int ufs_rsc_ctrl_pmic(bool hold); 57 void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version); 58 int ufs_spm_mtcmos_power(bool on); 59 int ufs_phy_spm_mtcmos_power(bool on); 60 bool ufs_is_clk_status_off(void); 61 void ufs_set_clk_status(bool on); 62 63 /* EMI interfaces */ 64 uint64_t emi_mpu_read_addr(unsigned int region, unsigned int offset); 65 uint64_t emi_mpu_read_enable(unsigned int region); 66 uint64_t emi_mpu_read_aid(unsigned int region, unsigned int aid_shift); 67 uint64_t emi_mpu_check_ns_cpu(void); 68 enum mtk_bl31_status emi_mpu_set_protection(uint32_t start, uint32_t end, 69 unsigned int region); 70 enum mtk_bl31_status emi_kp_set_protection(size_t start, size_t end, unsigned int region); 71 enum mtk_bl31_status emi_kp_clear_violation(unsigned int emiid); 72 enum mtk_bl31_status emi_clear_protection(unsigned int region); 73 enum mtk_bl31_status emi_clear_md_violation(void); 74 uint64_t emi_mpu_check_region_info(unsigned int region, uint64_t *sa, uint64_t *ea); 75 uint64_t emi_mpu_page_base_region(void); 76 uint64_t emi_mpu_smc_hp_mod_check(void); 77 enum mtk_bl31_status slb_clear_violation(unsigned int id); 78 enum mtk_bl31_status emi_clear_violation(unsigned int id, unsigned int type); 79 enum mtk_bl31_status slc_parity_select(unsigned int id, unsigned int port); 80 enum mtk_bl31_status slc_parity_clear(unsigned int id); 81 enum mtk_bl31_status emi_mpu_set_aid(unsigned int region, unsigned int num); 82 void emi_protection_init(void); 83 84 /* CPU QoS interfaces */ 85 void cpu_qos_change_dcc(uint32_t on, uint32_t is_auto); 86 void *cpu_qos_handle_cluster_on_event(const void *arg); 87 88 /* SMMU sid interfaces */ 89 int smmu_sid_init(void); 90 91 #endif /* __MTK_BL31_INTERFACE_H__ */ 92