157c73515SYidi Lin /* 257c73515SYidi Lin * Copyright (c) 2025, MediaTek Inc. All rights reserved. 357c73515SYidi Lin * 457c73515SYidi Lin * SPDX-License-Identifier: BSD-3-Clause 557c73515SYidi Lin */ 657c73515SYidi Lin 757c73515SYidi Lin #ifndef __MTK_BL31_INTERFACE_H__ 857c73515SYidi Lin #define __MTK_BL31_INTERFACE_H__ 957c73515SYidi Lin 1057c73515SYidi Lin #include <stdbool.h> 1157c73515SYidi Lin #include <stdint.h> 1257c73515SYidi Lin 13*97881aacSYidi Lin enum mtk_bl31_status { 14*97881aacSYidi Lin MTK_BL31_STATUS_SUCCESS = 0, 15*97881aacSYidi Lin MTK_BL31_STATUS_INVALID_PARAM = -1, 16*97881aacSYidi Lin MTK_BL31_STATUS_NOT_SUPPORTED = -2, 17*97881aacSYidi Lin MTK_BL31_STATUS_INVALID_RANGE = -3, 18*97881aacSYidi Lin MTK_BL31_STATUS_PERMISSION_DENY = -4, 19*97881aacSYidi Lin MTK_BL31_STATUS_LOCK_FAIL = -5, 20*97881aacSYidi Lin }; 21*97881aacSYidi Lin 22*97881aacSYidi Lin int mtk_bl31_map_to_sip_error(enum mtk_bl31_status status); 23*97881aacSYidi Lin 24*97881aacSYidi Lin enum mtk_bl31_memory_type { 25*97881aacSYidi Lin MTK_BL31_DEV_RW_SEC = 0, 26*97881aacSYidi Lin }; 27*97881aacSYidi Lin 28*97881aacSYidi Lin int mtk_bl31_mmap_add_dynamic_region(unsigned long long base_pa, size_t size, 29*97881aacSYidi Lin enum mtk_bl31_memory_type attr); 30*97881aacSYidi Lin int mtk_bl31_mmap_remove_dynamic_region(uintptr_t base_va, size_t size); 31*97881aacSYidi Lin 3257c73515SYidi Lin /* UFS definitions */ 3357c73515SYidi Lin enum ufs_mtk_mphy_op { 3457c73515SYidi Lin UFS_MPHY_BACKUP = 0, 3557c73515SYidi Lin UFS_MPHY_RESTORE, 3657c73515SYidi Lin }; 3757c73515SYidi Lin 3857c73515SYidi Lin enum ufs_notify_change_status { 3957c73515SYidi Lin PRE_CHANGE, 4057c73515SYidi Lin POST_CHANGE, 4157c73515SYidi Lin }; 4257c73515SYidi Lin 4357c73515SYidi Lin /* UFS interfaces */ 4457c73515SYidi Lin void ufs_mphy_va09_cg_ctrl(bool enable); 4557c73515SYidi Lin void ufs_device_reset_ctrl(bool rst_n); 4657c73515SYidi Lin void ufs_crypto_hie_init(void); 4757c73515SYidi Lin void ufs_ref_clk_status(uint32_t on, enum ufs_notify_change_status stage); 4857c73515SYidi Lin void ufs_sram_pwr_ctrl(bool on); 4957c73515SYidi Lin void ufs_device_pwr_ctrl(bool vcc_on, uint64_t ufs_version); 5057c73515SYidi Lin void ufs_mphy_ctrl(enum ufs_mtk_mphy_op op); 5157c73515SYidi Lin void ufs_mtcmos_ctrl(bool on); 5257c73515SYidi Lin 5331a69d9aSYidi Lin /* UFS functions implemented in the public ATF repo */ 5431a69d9aSYidi Lin int ufs_rsc_ctrl_mem(bool hold); 5531a69d9aSYidi Lin int ufs_rsc_ctrl_pmic(bool hold); 5631a69d9aSYidi Lin void ufs_device_pwr_ctrl_soc(bool vcc_on, uint64_t ufs_version); 5731a69d9aSYidi Lin int ufs_spm_mtcmos_power(bool on); 5831a69d9aSYidi Lin int ufs_phy_spm_mtcmos_power(bool on); 5931a69d9aSYidi Lin bool ufs_is_clk_status_off(void); 6031a69d9aSYidi Lin void ufs_set_clk_status(bool on); 6131a69d9aSYidi Lin 6257c73515SYidi Lin #endif /* __MTK_BL31_INTERFACE_H__ */ 63