xref: /rk3399_ARM-atf/plat/mediatek/include/mtk_bl31_interface.h (revision 57c7351545befba76ae4725ef602eca0491cc5ac)
1*57c73515SYidi Lin /*
2*57c73515SYidi Lin  * Copyright (c) 2025, MediaTek Inc. All rights reserved.
3*57c73515SYidi Lin  *
4*57c73515SYidi Lin  * SPDX-License-Identifier: BSD-3-Clause
5*57c73515SYidi Lin  */
6*57c73515SYidi Lin 
7*57c73515SYidi Lin #ifndef __MTK_BL31_INTERFACE_H__
8*57c73515SYidi Lin #define __MTK_BL31_INTERFACE_H__
9*57c73515SYidi Lin 
10*57c73515SYidi Lin #include <stdbool.h>
11*57c73515SYidi Lin #include <stdint.h>
12*57c73515SYidi Lin 
13*57c73515SYidi Lin /* UFS definitions */
14*57c73515SYidi Lin enum ufs_mtk_mphy_op {
15*57c73515SYidi Lin 	UFS_MPHY_BACKUP = 0,
16*57c73515SYidi Lin 	UFS_MPHY_RESTORE,
17*57c73515SYidi Lin };
18*57c73515SYidi Lin 
19*57c73515SYidi Lin enum ufs_notify_change_status {
20*57c73515SYidi Lin 	PRE_CHANGE,
21*57c73515SYidi Lin 	POST_CHANGE,
22*57c73515SYidi Lin };
23*57c73515SYidi Lin 
24*57c73515SYidi Lin /* UFS interfaces */
25*57c73515SYidi Lin void ufs_mphy_va09_cg_ctrl(bool enable);
26*57c73515SYidi Lin void ufs_device_reset_ctrl(bool rst_n);
27*57c73515SYidi Lin void ufs_crypto_hie_init(void);
28*57c73515SYidi Lin void ufs_ref_clk_status(uint32_t on, enum ufs_notify_change_status stage);
29*57c73515SYidi Lin void ufs_sram_pwr_ctrl(bool on);
30*57c73515SYidi Lin void ufs_device_pwr_ctrl(bool vcc_on, uint64_t ufs_version);
31*57c73515SYidi Lin void ufs_mphy_ctrl(enum ufs_mtk_mphy_op op);
32*57c73515SYidi Lin void ufs_mtcmos_ctrl(bool on);
33*57c73515SYidi Lin 
34*57c73515SYidi Lin #endif /* __MTK_BL31_INTERFACE_H__ */
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