xref: /rk3399_ARM-atf/plat/mediatek/include/lpm_v2/mt_lpm_dispatch.h (revision cf2df874cd09305ac7282fadb0fef6be597dfffb)
1*da8cc41bSWenzhen Yu /*
2*da8cc41bSWenzhen Yu  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3*da8cc41bSWenzhen Yu  *
4*da8cc41bSWenzhen Yu  * SPDX-License-Identifier: BSD-3-Clause
5*da8cc41bSWenzhen Yu  */
6*da8cc41bSWenzhen Yu 
7*da8cc41bSWenzhen Yu #ifndef MT_LPM_DISPATCH_H
8*da8cc41bSWenzhen Yu #define MT_LPM_DISPATCH_H
9*da8cc41bSWenzhen Yu 
10*da8cc41bSWenzhen Yu #include <stdint.h>
11*da8cc41bSWenzhen Yu 
12*da8cc41bSWenzhen Yu #include <lpm_v2/mt_lpm_smc.h>
13*da8cc41bSWenzhen Yu #include <mtk_sip_svc.h>
14*da8cc41bSWenzhen Yu 
15*da8cc41bSWenzhen Yu #define MTK_DISPATCH_ID_MAX	32
16*da8cc41bSWenzhen Yu 
17*da8cc41bSWenzhen Yu typedef uint64_t (*mt_lpm_dispatch_fn)(u_register_t x1, u_register_t x2,
18*da8cc41bSWenzhen Yu 				       u_register_t x3, u_register_t x4,
19*da8cc41bSWenzhen Yu 				       void *handle,
20*da8cc41bSWenzhen Yu 				       struct smccc_res *smccc_ret);
21*da8cc41bSWenzhen Yu 
22*da8cc41bSWenzhen Yu struct mt_dispatch_ctrl {
23*da8cc41bSWenzhen Yu 	unsigned int enable;
24*da8cc41bSWenzhen Yu 	mt_lpm_dispatch_fn fn[MT_LPM_SMC_USER_MAX];
25*da8cc41bSWenzhen Yu };
26*da8cc41bSWenzhen Yu 
27*da8cc41bSWenzhen Yu void mt_lpm_dispatcher_registry(unsigned int id, mt_lpm_dispatch_fn fn);
28*da8cc41bSWenzhen Yu 
29*da8cc41bSWenzhen Yu void mt_secure_lpm_dispatcher_registry(unsigned int id, mt_lpm_dispatch_fn fn);
30*da8cc41bSWenzhen Yu 
31*da8cc41bSWenzhen Yu extern struct mt_dispatch_ctrl mt_dispatcher;
32*da8cc41bSWenzhen Yu extern struct mt_dispatch_ctrl mt_secure_dispatcher;
33*da8cc41bSWenzhen Yu 
34*da8cc41bSWenzhen Yu #endif /* MT_LPM_DISPATCH_H */
35*da8cc41bSWenzhen Yu 
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