xref: /rk3399_ARM-atf/plat/mediatek/include/lpm/mt_lp_rm.h (revision 1c5fc9a25417cbfb08c8aa12a2e398e202fda3d7)
1*1c5fc9a2SLiju-Clr Chen /*
2*1c5fc9a2SLiju-Clr Chen  * Copyright (c) 2020-2023, MediaTek Inc. All rights reserved.
3*1c5fc9a2SLiju-Clr Chen  *
4*1c5fc9a2SLiju-Clr Chen  * SPDX-License-Identifier: BSD-3-Clause
5*1c5fc9a2SLiju-Clr Chen  */
6*1c5fc9a2SLiju-Clr Chen 
7*1c5fc9a2SLiju-Clr Chen #ifndef MT_LP_RM_H
8*1c5fc9a2SLiju-Clr Chen #define MT_LP_RM_H
9*1c5fc9a2SLiju-Clr Chen 
10*1c5fc9a2SLiju-Clr Chen #include <stdbool.h>
11*1c5fc9a2SLiju-Clr Chen 
12*1c5fc9a2SLiju-Clr Chen #define MT_RM_STATUS_OK		(0)
13*1c5fc9a2SLiju-Clr Chen #define MT_RM_STATUS_BAD	(-1)
14*1c5fc9a2SLiju-Clr Chen #define MT_RM_STATUS_STOP	(-2)
15*1c5fc9a2SLiju-Clr Chen 
16*1c5fc9a2SLiju-Clr Chen enum PLAT_MT_LPM_RC_TYPE {
17*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_UPDATE_CONDITION,
18*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_STATUS,
19*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_UPDATE_REMAIN_IRQS,
20*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_IS_FMAUDIO,
21*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_IS_ADSP,
22*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_ENTER_CNT,
23*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_CLKBUF_STATUS,
24*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_UFS_STATUS,
25*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_IS_USB_PERI,
26*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_IS_USB_INFRA,
27*1c5fc9a2SLiju-Clr Chen 	PLAT_RC_MAX,
28*1c5fc9a2SLiju-Clr Chen };
29*1c5fc9a2SLiju-Clr Chen 
30*1c5fc9a2SLiju-Clr Chen enum plat_mt_lpm_hw_ctrl_type {
31*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_MDSRC_REQ,
32*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_MDSRC_ACK,
33*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_IS_MD_SLEEP,
34*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_MDSRC_SETTLE,
35*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_GPUEB_PLL_CONTROL,
36*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_GPUEB_GET_PWR_STATUS,
37*1c5fc9a2SLiju-Clr Chen 	PLAT_AP_HW_CTRL_MAX,
38*1c5fc9a2SLiju-Clr Chen };
39*1c5fc9a2SLiju-Clr Chen 
40*1c5fc9a2SLiju-Clr Chen struct mt_resource_constraint {
41*1c5fc9a2SLiju-Clr Chen 	int level;
42*1c5fc9a2SLiju-Clr Chen 	int (*init)(void);
43*1c5fc9a2SLiju-Clr Chen 	bool (*is_valid)(unsigned int cpu, int stateid);
44*1c5fc9a2SLiju-Clr Chen 	int (*update)(int stateid, int type, const void *p);
45*1c5fc9a2SLiju-Clr Chen 	int (*run)(unsigned int cpu, int stateid);
46*1c5fc9a2SLiju-Clr Chen 	int (*reset)(unsigned int cpu, int stateid);
47*1c5fc9a2SLiju-Clr Chen 	int (*get_status)(unsigned int type, void *priv);
48*1c5fc9a2SLiju-Clr Chen 	unsigned int (*allow)(int stateid);
49*1c5fc9a2SLiju-Clr Chen };
50*1c5fc9a2SLiju-Clr Chen 
51*1c5fc9a2SLiju-Clr Chen struct mt_resource_manager {
52*1c5fc9a2SLiju-Clr Chen 	int (*update)(struct mt_resource_constraint **con,
53*1c5fc9a2SLiju-Clr Chen 		      int stateid, void *priv);
54*1c5fc9a2SLiju-Clr Chen 	struct mt_resource_constraint **consts;
55*1c5fc9a2SLiju-Clr Chen };
56*1c5fc9a2SLiju-Clr Chen 
57*1c5fc9a2SLiju-Clr Chen extern int mt_lp_rm_register(struct mt_resource_manager *rm);
58*1c5fc9a2SLiju-Clr Chen extern int mt_lp_rm_find_and_run_constraint(int idx, unsigned int cpuid,
59*1c5fc9a2SLiju-Clr Chen 					    int stateid, void *priv);
60*1c5fc9a2SLiju-Clr Chen extern int mt_lp_rm_reset_constraint(int constraint_id, unsigned int cpuid,
61*1c5fc9a2SLiju-Clr Chen 				     int stateid);
62*1c5fc9a2SLiju-Clr Chen extern int mt_lp_rm_do_update(int stateid, int type, void const *p);
63*1c5fc9a2SLiju-Clr Chen extern int mt_lp_rm_get_status(unsigned int type, void *priv);
64*1c5fc9a2SLiju-Clr Chen 
65*1c5fc9a2SLiju-Clr Chen #endif /* MT_LP_RM_H */
66