145d50759SJames Liao /* 2*01ce1d5dSWenzhen Yu * Copyright (c) 2023-2024, MediaTek Inc. All rights reserved. 345d50759SJames Liao * 445d50759SJames Liao * SPDX-License-Identifier: BSD-3-Clause 545d50759SJames Liao */ 645d50759SJames Liao 745d50759SJames Liao #ifndef MT_SPM_RESOURCE_REQ_H 845d50759SJames Liao #define MT_SPM_RESOURCE_REQ_H 945d50759SJames Liao 1045d50759SJames Liao /* SPM resource request internal bit */ 1145d50759SJames Liao #define MT_SPM_BIT_XO_FPM (0U) 1245d50759SJames Liao #define MT_SPM_BIT_26M (1U) 1345d50759SJames Liao #define MT_SPM_BIT_INFRA (2U) 1445d50759SJames Liao #define MT_SPM_BIT_SYSPLL (3U) 1545d50759SJames Liao #define MT_SPM_BIT_DRAM_S0 (4U) 1645d50759SJames Liao #define MT_SPM_BIT_DRAM_S1 (5U) 17*01ce1d5dSWenzhen Yu #define MT_SPM_BIT_VCORE (6U) 18*01ce1d5dSWenzhen Yu #define MT_SPM_BIT_EMI (7U) 19*01ce1d5dSWenzhen Yu #define MT_SPM_BIT_PMIC (8U) 2045d50759SJames Liao 2145d50759SJames Liao /* SPM resource request internal bit_mask */ 2245d50759SJames Liao #define MT_SPM_XO_FPM BIT(MT_SPM_BIT_XO_FPM) 2345d50759SJames Liao #define MT_SPM_26M BIT(MT_SPM_BIT_26M) 2445d50759SJames Liao #define MT_SPM_INFRA BIT(MT_SPM_BIT_INFRA) 2545d50759SJames Liao #define MT_SPM_SYSPLL BIT(MT_SPM_BIT_SYSPLL) 2645d50759SJames Liao #define MT_SPM_DRAM_S0 BIT(MT_SPM_BIT_DRAM_S0) 2745d50759SJames Liao #define MT_SPM_DRAM_S1 BIT(MT_SPM_BIT_DRAM_S1) 28*01ce1d5dSWenzhen Yu #define MT_SPM_VCORE BIT(MT_SPM_BIT_VCORE) 29*01ce1d5dSWenzhen Yu #define MT_SPM_EMI BIT(MT_SPM_BIT_EMI) 30*01ce1d5dSWenzhen Yu #define MT_SPM_PMIC BIT(MT_SPM_BIT_PMIC) 3145d50759SJames Liao 3245d50759SJames Liao #endif /* MT_SPM_RESOURCE_REQ_H */ 33