1 /* 2 * Copyright (c) 2025, Mediatek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef PMIC_SET_LOWPOWER_H 8 #define PMIC_SET_LOWPOWER_H 9 10 #include <stdint.h> 11 12 #include <drivers/spmi_api.h> 13 14 #include "mt6316_lowpower_reg.h" 15 #include "mt6363_lowpower_reg.h" 16 #include "mt6373_lowpower_reg.h" 17 18 #define OP_MODE_MU 0 19 #define OP_MODE_LP 1 20 21 #define HW_OFF 0 22 #define HW_ON 0 23 #define HW_LP 1 24 #define HW_ONLV (0x10 | 1) 25 #define NORMAL_OP_CFG 0x10 26 27 enum { 28 RC0 = 0, 29 RC1, 30 RC2, 31 RC3, 32 RC4, 33 RC5, 34 RC6, 35 RC7, 36 RC8 = 0, 37 RC9, 38 RC10, 39 RC11, 40 RC12, 41 RC13, 42 HW0 = 0, 43 HW1, 44 HW2, 45 HW3, 46 HW4, 47 HW5, 48 HW6, 49 HW7, 50 HW8 = 0, 51 HW9, 52 HW10, 53 HW11, 54 HW12, 55 HW13, 56 }; 57 58 #define VOTER_EN_SET 1 59 #define VOTER_EN_CLR 2 60 61 enum { 62 VOTER_EN_LO_BIT0 = 0, 63 VOTER_EN_LO_BIT1, 64 VOTER_EN_LO_BIT2, 65 VOTER_EN_LO_BIT3, 66 VOTER_EN_LO_BIT4, 67 VOTER_EN_LO_BIT5, 68 VOTER_EN_LO_BIT6, 69 VOTER_EN_LO_BIT7, 70 VOTER_EN_HI_BIT0 = 0, 71 VOTER_EN_HI_BIT1, 72 VOTER_EN_HI_BIT2, 73 VOTER_EN_HI_BIT3, 74 }; 75 76 enum { 77 MT6363_SLAVE = SPMI_SLAVE_4, 78 MT6368_SLAVE = SPMI_SLAVE_5, 79 MT6369_SLAVE = SPMI_SLAVE_5, 80 MT6373_SLAVE = SPMI_SLAVE_5, 81 MT6316_S6_SLAVE = SPMI_SLAVE_6, 82 MT6316_S7_SLAVE = SPMI_SLAVE_7, 83 MT6316_S8_SLAVE = SPMI_SLAVE_8, 84 MT6316_S15_SLAVE = SPMI_SLAVE_15, 85 MT6319_S6_SLAVE = SPMI_SLAVE_6, 86 MT6319_S7_SLAVE = SPMI_SLAVE_7, 87 MT6319_S8_SLAVE = SPMI_SLAVE_8, 88 MT6319_S15_SLAVE = SPMI_SLAVE_15, 89 }; 90 91 extern struct spmi_device *lowpower_sdev[SPMI_MAX_SLAVE_ID]; 92 93 #define PMIC_BUCK_SET_LP(_chip, _name, _user, _en, _mode, _cfg) \ 94 { \ 95 uint8_t val = 0; \ 96 struct spmi_device *sdev = lowpower_sdev[_chip##_SLAVE]; \ 97 if (sdev && \ 98 !spmi_ext_register_readl(sdev, _chip##_RG_BUCK_##_name##_HW0_OP_CFG_ADDR, &val, 1) && \ 99 !(val & NORMAL_OP_CFG)) {\ 100 if ((_cfg) == HW_ONLV) { \ 101 pmic_spmi_update_bits(sdev, \ 102 _chip##_RG_BUCK_##_name##_ONLV_EN_ADDR, \ 103 (1 << _chip##_RG_BUCK_##_name##_ONLV_EN_SHIFT), \ 104 (1 << _chip##_RG_BUCK_##_name##_ONLV_EN_SHIFT)); \ 105 } else if ((_cfg) == HW_LP) { \ 106 pmic_spmi_update_bits(sdev, \ 107 _chip##_RG_BUCK_##_name##_ONLV_EN_ADDR, \ 108 (1 << _chip##_RG_BUCK_##_name##_ONLV_EN_SHIFT), \ 109 0); \ 110 } \ 111 pmic_spmi_update_bits(sdev, \ 112 _chip##_RG_BUCK_##_name##_##_user##_OP_CFG_ADDR, \ 113 1 << (_user), \ 114 ((_cfg) & 0x1) ? 1 << (_user) : 0); \ 115 pmic_spmi_update_bits(sdev, \ 116 _chip##_RG_BUCK_##_name##_##_user##_OP_MODE_ADDR, \ 117 1 << (_user), \ 118 (_mode) ? 1 << (_user) : 0); \ 119 pmic_spmi_update_bits(sdev, \ 120 _chip##_RG_BUCK_##_name##_##_user##_OP_EN_ADDR, \ 121 1 << (_user), \ 122 (_en) ? 1 << (_user) : 0); \ 123 } \ 124 } 125 126 #define PMIC_LDO_SET_LP(_chip, _name, _user, _en, _mode, _cfg) \ 127 { \ 128 uint8_t val = 0; \ 129 struct spmi_device *sdev = lowpower_sdev[_chip##_SLAVE]; \ 130 if (sdev && \ 131 !spmi_ext_register_readl(sdev, _chip##_RG_LDO_##_name##_HW0_OP_CFG_ADDR, &val, 1) && \ 132 !(val & NORMAL_OP_CFG)) {\ 133 if ((_cfg) == HW_ONLV) { \ 134 pmic_spmi_update_bits(sdev, \ 135 _chip##_RG_LDO_##_name##_ONLV_EN_ADDR, \ 136 (1 << _chip##_RG_LDO_##_name##_ONLV_EN_SHIFT), \ 137 (1 << _chip##_RG_LDO_##_name##_ONLV_EN_SHIFT)); \ 138 } else { \ 139 pmic_spmi_update_bits(sdev, \ 140 _chip##_RG_LDO_##_name##_ONLV_EN_ADDR, \ 141 (1 << _chip##_RG_LDO_##_name##_ONLV_EN_SHIFT), \ 142 0); \ 143 } \ 144 pmic_spmi_update_bits(sdev, \ 145 _chip##_RG_LDO_##_name##_##_user##_OP_CFG_ADDR, \ 146 1 << (_user), \ 147 ((_cfg) & 0x1) ? 1 << (_user) : 0); \ 148 pmic_spmi_update_bits(sdev, \ 149 _chip##_RG_LDO_##_name##_##_user##_OP_MODE_ADDR, \ 150 1 << (_user), \ 151 (_mode) ? 1 << (_user) : 0); \ 152 pmic_spmi_update_bits(sdev, \ 153 _chip##_RG_LDO_##_name##_##_user##_OP_EN_ADDR, \ 154 1 << (_user), \ 155 (_en) ? 1 << (_user) : 0); \ 156 } \ 157 } 158 159 #define PMIC_SLVID_BUCK_SET_LP(_chip, _slvid, _name, _user, _en, _mode, _cfg) \ 160 { \ 161 struct spmi_device *sdev = lowpower_sdev[_chip##_##_slvid##_SLAVE]; \ 162 if (sdev) {\ 163 pmic_spmi_update_bits(sdev, \ 164 _chip##_RG_BUCK_##_name##_##_user##_OP_CFG_ADDR, \ 165 1 << (_user), \ 166 (_cfg) ? 1 << (_user) : 0); \ 167 pmic_spmi_update_bits(sdev, \ 168 _chip##_RG_BUCK_##_name##_##_user##_OP_MODE_ADDR, \ 169 1 << (_user), \ 170 (_mode) ? 1 << (_user) : 0); \ 171 pmic_spmi_update_bits(sdev, \ 172 _chip##_RG_BUCK_##_name##_##_user##_OP_EN_ADDR, \ 173 1 << (_user), \ 174 (_en) ? 1 << (_user) : 0); \ 175 } \ 176 } 177 178 #define PMIC_BUCK_VOTER_EN(_chip, _name, _user, _cfg) \ 179 { \ 180 struct spmi_device *sdev = lowpower_sdev[_chip##_SLAVE]; \ 181 if (sdev) {\ 182 pmic_spmi_update_bits(sdev, \ 183 _chip##_RG_BUCK_##_name##_##_user##_ADDR + (_cfg), \ 184 1 << (_user), \ 185 1 << (_user)); \ 186 } \ 187 } 188 189 static inline int pmic_spmi_update_bits(struct spmi_device *sdev, uint16_t reg, 190 uint8_t mask, uint8_t val) 191 { 192 uint8_t org = 0; 193 int ret = 0; 194 195 ret = spmi_ext_register_readl(sdev, reg, &org, 1); 196 if (ret < 0) 197 return ret; 198 199 org &= ~mask; 200 org |= val & mask; 201 202 ret = spmi_ext_register_writel(sdev, reg, &org, 1); 203 return ret; 204 } 205 206 #endif /* PMIC_SET_LOWPOWER_H */ 207