xref: /rk3399_ARM-atf/plat/mediatek/include/drivers/pmic/pmic_psc.h (revision 10ecd58093a34e95e2dfad65b1180610f29397cc)
1 /*
2  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef PMIC_PSC_H
8 #define PMIC_PSC_H
9 
10 #include <stdint.h>
11 
12 enum pmic_psc_reg_name {
13 	RG_PWRHOLD,
14 	RG_CRST,
15 	RG_SMART_RST_SDN_EN,
16 	RG_SMART_RST_MODE,
17 };
18 
19 struct pmic_psc_reg {
20 	uint16_t reg_addr;
21 	uint16_t reg_mask;
22 	uint16_t reg_shift;
23 };
24 
25 struct pmic_psc_config {
26 	int (*read_field)(uint32_t reg, uint32_t *val, uint32_t mask, uint32_t shift);
27 	int (*write_field)(uint32_t reg, uint32_t val, uint32_t mask, uint32_t shift);
28 	const struct pmic_psc_reg *regs;
29 	const uint32_t reg_size;
30 };
31 
32 #define PMIC_PSC_REG(_reg_name, addr, shift) \
33 	[_reg_name] = {			\
34 		.reg_addr = addr,	\
35 		.reg_mask = 0x1,	\
36 		.reg_shift = shift,	\
37 	}
38 
39 int enable_pmic_smart_reset(bool enable);
40 int enable_pmic_smart_reset_shutdown(bool enable);
41 int platform_cold_reset(void);
42 int platform_power_hold(bool hold);
43 int pmic_psc_register(const struct pmic_psc_config *psc);
44 
45 #endif /* PMIC_PSC_H */
46